• Title/Summary/Keyword: 캐패시터

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Manufacture of a single gate MESFET mixer at PCS frequency band (PCS 주파수 대역 단일 게이트 MESFET 혼합기의 제작)

  • 이성용;임인성;한상철;류정기;오승엽
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.9 no.1
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    • pp.25-33
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    • 1998
  • In this paper, we describe a single-gate MESFET mixer at PCS(Personal Communication Service) frequency band. The PCS frequency band is 1965~2025 MHz in FR and 140 MHz in IF irrespectly. The design of the mixer was executed by microwave simulator, EEsof Libra. The matching network is consisted of rectangular inductor, MIM capacitor and open stub. The ma- nufacture work was accomplished by the micro-pen and wedge-bonder. The mixer showed $6.69\pm0.65$ dB of conversion gain, $-14.9\pm3.5$dB of RF reflection coefficient and 57.83 dB of LO/IF isolation at 10 dBm of LO power when LO frequency is 1855 MHz. When this mixer is used at PCS terminal, IF-amplifier which compensates the conversion loss of diode mixer may be omitted.

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Design of a Dual-Band Loop-Type Ground Antenna Using Lumped-Elements (집중 소자를 사용한 이중 대역 루프형 그라운드 안테나 설계)

  • Lee, Hyung-Jin;Liu, Yang;Lee, Jae-Seok;Kim, Hyung-Hoon;Kim, Hyeong-Dong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.5
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    • pp.551-558
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    • 2012
  • This paper presents a dual band loop-type ground antenna using lumped-elements that control the impedance bandwidth and resonant frequency. The dual-band operation of the proposed antenna is realized by inserting an additional resonated loop feed structure into the reference ground antenna. As the proper value of the capacitor and the inductor are chosen, the impedance bandwidth of our antenna with voltage standing wave ratio(VSWR) equal to 3 is 85 MHz and 725 MHz at the 2.45 and 5.5 GHz frequency band, respectively. Its validity is demonstrated via both the computed and measured results. Good antenna patterns and efficiencies are achieved at the dual frequency bands, as well as the physically small antenna element size($10{\times}5mm^2$).

Design and Fabrication of Multilayer Diplexer for Dual Band GSM/DCS Applications using Lumped Elements (집중 소자를 이용한 이중 대역 GSM/DCS용 적층형 다이플렉서의 설계 및 제작)

  • 심성훈;강종윤;최지원;윤영중;김현재;윤석진
    • Journal of the Korean Ceramic Society
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    • v.40 no.11
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    • pp.1090-1095
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    • 2003
  • In this paper, the modeling and design of high-Q multilayer passives and multilayer diplexer for GSM/DCS applications designed and fabricated using these passives have been investigated.. To miniaturize the system, configurations of inductor and capacitor have involved a square spiral structure and a vertically-interdigitated capacitor similar to 3D interdigital structure, respectively. Multilayer diplexers for GSM/DCS applications were designed and fabricated to apply high-Q multilayer passives to practical systems, which were designed by the proposed structural and equivalent circuit model. LPF for GSM band had the passband insertion loss of less than 0.55 dB, the return loss of more than 12 dB, and the isolation level of more than 26 dB by locating attenuation pole at 1800 MHz. HPF for DCS band had the passband insertion loss of less than 0.82 dB, the return loss of more than 11 dB, and the isolation level of more than 38 dB by locating attenuation pole at 930 MHz.

Study on the structure of buried type capacitor for MCM (Multi-Chip-Module) (MCM-C(Multi-Chip-Module)용 내장형 캐패시터의 구조적 특성에 관한 연구)

  • Yoo, C. S.;Lee, W. S.;Cho, H. M.;Lim, W.;Kwak, S. B.;Kang, N. K.;Park, J. C.
    • Journal of the Microelectronics and Packaging Society
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    • v.6 no.4
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    • pp.49-53
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    • 1999
  • In this study, the characteristics of the structure of buried type capacitor for RF multi- chip-module are investigated. We developed many kinds of structures to minimize the space of capacitor in module and the value of parastic series inductance without any loss in capacitance, and in this procedure the effect of vias especially position, size, number length are analyzed and optimized. This characteristics of structures are checked through HFSS(high frequency structure simulator) of HP, and the value of parastic series inductance is calculated by equivalent circuit analysis. And ensuing the result of simulation, we made buried type capacitors using LTCC (low temperature cofired ceramic) material. In measurement of this sample, we found out the effective and precise method can be applied to buried type and characteristics of vias and striplines added for measuring are quantified.

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Three-phase current-fed soft-switching type resonant DC-link snubber converter with switched capacitor (스위치 캐패시터형 공진 DC-링크를 사용한 3상 전류형 소프트 스위칭 PWM 컨버터)

  • Kim, Ju-Yong;Suh, Ki-Young;Lee, Hyun-Woo;Mun, Sang-Pil;Kim, Young-Mun
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2005.11a
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    • pp.387-390
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    • 2005
  • A This paper presents a novel three-phase current-fed Pulse Width Modulation converter with switched- capacitor type resonant DC link commutation circuit operating PWM pattern strategy under a design consideration of low-pass filter, which can operate on the basis of the principle of zero current soft-switching commutation. In the first place, the steady-state operating principle of this converter with a new resonant DC link snubber circuit is described in connection with the equivalent operation circuit, together with the practical design procedure of the switched-capacitor type resonant DC link circuit is discussed from a theoretical viewpoint on the basis of a design example for high-power applications. The actively delayed time correction method to compensate distorted currents due to a relatively long resonant commutation time is newly implemented in the open loop control scheme so as to acquire the new optimum PWM pattern. Finally, the experiment or set-up in laboratory system or this converter is concretely demonstrated herein to confirm a zero current soft-switching commutation of this converter. The comparative evaluations between current-fed hard switching PWM and soft-switching PWM converters are carried out from a viewpoint of their PWM converter characteristics.

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Preparation and Characteristics of PLT(28) Thin Film Using Sol-Gel Method (Sol-Gel 법을 이용한 PLT(28) 박막의 제작과 특성)

  • Kang, Seong-Jun;Joung, Yang-Hee;Yoo, Jae-Hung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.2
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    • pp.865-868
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    • 2005
  • We fabricated the $Pb_{0.72}La_{0.28}TiO_3 (PLT(28))$ thin film successfully by using the sol-gel method and characterized it to evaluate its potential for being utilized as the capacitor dielectrics of ULSI DRAMs. In our sol-gel process, the acetates were used as the starting materials. Through the TGA-DTA analysis, we established the excellent fabrication conditions of the sol-gel method for the PLT(28) thin film. We obtained the dense and crack-free PLT(28) thin film of 100% perovskite phase by drying at 350$^{\circ}C$ after each coating and final annealing at 650$^{\circ}C$. Electrical properties of PLT(28) thin film were measured through formation on the Pt/Ti/SiO$_2$/Si substrate and its dielectric constant and leakage current density were measured as 936 and 1.1${\mu}$A/cm$^2$, respectively

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The Electrical Properties of High Voltage Mutilayer Chip Capacitor with X7R by addition of Er2O3 and Glass Frit (고압용 X7R 적층 칩 캐패시터의 Er2O3 및 유리프릿 첨가에 따른 전기적 특성)

  • Yoon, Jung-Rag;Kim, Min-Kee;Chung, Tae-Seog;Woo, Byoung-Chul;Lee, Seog-Won
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.5
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    • pp.440-446
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    • 2008
  • To manufacture the MLCC with X7R for high voltage stability, $BaTiO_3-MgO-MnO_2-Y_2O_3$ with $(Ba_{0.4}Ca_{0.6})SiO_3$ glass frit was formulated. Based on this composition, the addition of $Er_2O_3$ showed that TCC(Temperature Coefficient Capacitance) at $85^{\circ}C$ was improved from 5 % to ${\sim}0\;%$, but the dielectric constant and IR (Insulation Resistance) were decreased. The glass frit improved the dielectric constant and IR, so the appropriate contents of $Er_2O_3$ and glass frit were 0.6 mol% and 1 wt%, respectively. It showed that the dielectric constant and RC constant were 2,550 and 2,000 (${\Omega}F$), respectively in the sintering condition at $1250^{\circ}C$ in PO2 $10^{-7}$ Mpa. The MLCC with $3.2{\times}1.6$ (mm) size and $1\;{\mu}F$ was also suited for X7R with the above composition.

An analysis of a phase- shifted parallel-input/series-output dual converter for high-power step-up applications (대용량 승압형 위상천이 병렬입력/직렬출력 듀얼 컨버터의 분석)

  • 강정일;노정욱;문건우;윤명중
    • The Transactions of the Korean Institute of Power Electronics
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    • v.6 no.5
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    • pp.400-409
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    • 2001
  • A new phase-shifted parallel-input/series-output(PISO) dual converter for tush-power step-up applications has been proposed. Since the proposed converter shows a low switch turn-off voltage stress, switching devices with low conduction loss can be employed in order to improve the power conversion efficiency. Moreover, it features a low output capacitor root-mean-square(RMS) current stress, low input current and output voltage ripple contents, and fast control-to-output dynamics compared to its PWM counterpart. In this paper, the operation of the proposed converter is analyzed in detail and its mathematical models and steady-state solutions are presented. A comparative analysis with the conventional PWM PISO dual converter is also provided. To confirm the operation, features, and validity of the Proposed converter, experimental results from an 800W, 24-350Vdc prototype are presented.

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Electrical Characteristics of BST Thin Films with Various Film Thickness (BST 박막의 두께 변화에 따른 전기적 특성에 관한 연구)

  • 강성준;정양희
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.5
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    • pp.696-702
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    • 2002
  • The BST $({Bal-xSrxTiO_3})$ (50/50) thin film has been grown by RF magnetron reactive sputtering and its characteristics such as crystallization, surface roughness, and electrical properties have been investigated with varying the film thickness. The crystallization and surface roughness of BST thin film are investigated by using XRD and AFM, respectively. The BST thin film annealed at $800^{\circ}C$ for 2 min has pure perovskite structure and good surface roughness of 16.1$\AA$. As the film thickness increases from 80 nm to 240 nm, the dielectric constant at 10 KHz increases from 199 to 265 and the leakage current density at 250 ㎸/cm decreases from $0.779 {\mu}A/{cm^2} to 0.184 {\mu}A/{cm^2}$. In the case of 240 nm-thick BST thin film, the charge storage density and leakage current density at 5V are 50.5 fC/${{\mu}m^2} and 0.182 {\mu}A/{cm^2}$, respectively. The values indicate that the BST thin film is a very useful dielectric material for the DRAM capacitor.

A Single-Ended Transmitter with Variable Parallel Termination (가변 병렬 터미네이션을 가진 단일 출력 송신단)

  • Kim, Sang-Hun;Uh, Ji-Hun;Jang, Young-Chan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.490-492
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    • 2010
  • A swing level controlled voltage-mode transmitter is proposed to support a stub series-terminated logic channel with center-tapped termination. This transmitter provides a swing level control to support the diagnostic mode and improve the signal integrity in the absence of the destination termination. By using the variable parallel termination, the proposed transmitter maintains the constant output impedance of the source termination while the swing level is controlled. Also, the series termination using an external resistor is used to reduce the impedance mismatch effect due to the parasitic components of the capacitor and inductor. To verify the proposed transmitter, the voltage-mode driver, which provides eight swing levels with the constant output impedance of about $50{\Omega}$, was implemented using a 70nm 1-poly 3-metal DRAM process with a 1.5V supply. The jitter reduction of 54% was measured with the swing level controlled voltage-mode driver in the absence of the destination termination at 1.6-Gb/s.

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