• Journal of the Korea Academia-Industrial cooperation Society
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• 제8권2호
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• pp.324-332
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• 2007

In this paper, we developed remote control devices that can be controlled passive component e.g. resistor, inductor, capacitor that is a basic element in the electric circuit. We embodied a remote laboratory for basic circuit theory which learners can experiment controlling element value to remote through the internet. It was seen that is useful applying passive component developing to a remote laboratory. Because developed passive components can response in an experiment altering several element values to remote, they will be used very usefully in a remote experiment that equip various experiment theme. Therefor the proposed laboratory will be solved problems of virtual laboratory which students do not handle instruments in engineering experiment. With our proposed system, students can experiment any time, anywhere.

• Journal of the Korea Institute of Information and Communication Engineering
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• 제9권7호
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• pp.1491-1496
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• 2005

We fabricated the $Pb_{0.72}La_{0.28}TiO_3$ (PLT(28)) thin film successfully by using the sol-gel method and characterized it to evaluate its potential for being utilized as the capacitor dielectrics of ULSI DRAMs. In our sol-gel process, the acetates were used as the starting materials. Through the TGA-DTA analysis, we established the excellent fabrication conditions of the sol-gel method for the PLT(28) thin film. We obtained the dense and crack-free PLT(28) thin film of $100\%$ perovskite phase by drying at $350^{\circ}C$ after each coating and final annealing at $650^{\circ}C$. Electrical properties of PLT(28) thin film were measured through formation on the $Pt/Ti/SiO_2/Si$ substrate and its dielectric constant and leakage current density were measured as 936 and $1.1{\mu}A/cm^2$, respectively.

• Proceedings of the KIPE Conference
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.490-492
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• 2008

고압 전원 장치(High Voltage Power Supply)는 근래에 와서 산업전반에 응용이 매우 광범위하게 확산되고 있고 고전압 장치가 필수적으로 이용 되어야 하는 분야가 점차 확산되고 있다. 응용분야로는 신소재 개발과 플라즈마 응용을 위한 공업용과 민생용, 의료기기용, 군사용, 또한 프린터에 이르기까지 다양하게 있다. 가정이나 사무실에서 쉽게 접할 수 있는 IT장비인 프린터인 경우에도 전원 공급 장치의 측면에서는 화상형성에 있어 가장 필수적인 안정적이고 다기능을 가지는 고압 전원장치를 적용하고 있고, 수요 또한 증가하고 있다. 본 논문은 낮은 입력 DC전압에서 높은 음의 DC전압을 출력하는 높은 전환 비의 극성 반전 형 DC/DC 전력 변환 회로에 관한 것으로써, 하나의 스위치, 하나의 인덕터, 그리고 다수개의 캐패시터와 다이오드로 구성된다. 기존의 극성 반전 형 DC/DC 컨버터 회로와 비교하여, 고압 변환 트랜스포머 대신에 인덕터를 사용할 수 있어, 자기 소자의 부피 및 크기는 물론 원가저감이 가능하다. 또한 반도체 소자의 Voltage Stress가 감소된다. 제안된 회로의 원리를 분석하고, 종래의 고압 전원장치와 비교함으로써 장점을 알아본 후, 동작원리에 대한 타당성을 Simulation 및 실험을 통하여 검증한다.

• Journal of the Korean Vacuum Society
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• 제15권3호
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• pp.266-272
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• 2006

Application of power higher than the optimum operation value to an external electrode fluorescent lamps(EEFL) leads to the formation of small holes, called pinholes, which subsequently leads to lamp failure. The pinholes come from the insulating breakdown of the capacitor which is the dielectric layer between an external electrode and glass tube. The power of insulation breakdown is proportional to the electric power applied to the lamp. When a lamp current is low in the glass tube of dielectric constant K, the dielectric field strength of pinholes is about 3K kV/mm. The field strength of insulation breakdown decreases as the lamp current increases.

• Journal of IKEEE
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• 제8권1호
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• pp.152-159
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• 2004

In this study, we design the one-chip PWM IC with high voltage power switch (300V class LDMOSFET) for SMPS (Switching Mode Power Supply) application. Reference circuits generate constant voltage(5V) in the various of power supply and temperature condition. Error amp. is designed with large DC gain $({\simeq}65dB)$, unity frequency $({\simeq}190kHz)$ and large $PM(75^{\circ})$. comparator is designed with 2 stage. Saw tooth generators operate with 20kHz oscillation frequency. Also, we optimize drift concentration & drift length of n-LDMOSFET for design of high voltage switching device. It is shown that simulation results have the breakdown voltage of 350V. (using ISE-TCAD Simulation tool). PWM IC with power switching device is designed with 2um design rule and Bi-DMOS technology.

• The Journal of the Korea institute of electronic communication sciences
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• 제15권3호
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• pp.487-494
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• 2020

In this paper, we propose a current memory circuit design that reduces static power consumption and maximizes the advantages of current mode signal processing. The proposed current memory circuit minimizes the problem in which the current transfer error increases as the data transfer time increases due to clock-feedthrough and charge-injection of the existing current memory circuit. The proposed circuit is designed to insert a support MOS capacitor that maximizes the Miller effect in the current transfer structure capable of low-power operation. As a result, it shows the improved current transfer error according to the memory time. From the experimental results of the chip, manufactured with MagnaChip / SK Hynix 0.35 process, it was verified that the current transfer error, according to the memory time, reduced to 5% or less.

• Journal of the Institute of Electronics Engineers of Korea SD
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• 제47권5호
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• pp.100-105
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• 2010

A multi-band low noise amplifier (LNA) is designed in 90 nm RF CMOS process for 3GPP LTE (3rd Generation Partner Project Long Term Evolution) applications. The designed multi-band LNA covers the eight frequency bands between 1.85 and 2.8 GHz. A tunable input matching circuit is realized by adopting a switched capacitor array at the LNA input stage for providing optimum performances across the wide operating band. Current steering technique is adopted for the gain control in three steps. The performances of the LNA are verified through post-layout simulations (PLS). The LNA consumes 17 mA at 1.2 V supply voltage. It shows a power gain of 26 at the normal gain mode, and provides much lower gains of 0 and -6.7 in the bypass-I and -II modes, respectively. It achieves a noise figure of 1.78 dB and a IIP3 of -12.8 dBm over the entire band.

• Journal of the Institute of Electronics Engineers of Korea SC
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• 제39권4호
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• pp.25-35
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• 2002

This work describes an 8b 200MHz time-interleaved subranging analog-to-digital converter (ADC) based on a single-poly digital CMOS process. Two fine ADCs for lower digital bits of the proposed ADC employ a time-sharing double-channel architecture to increase system speed and a new reference voltage switching scheme to reduce settling time of the reference voltages and chip area. The proposed intermeshed resistor string, which generates reference voltages for fine ADCs, improves linearity and settling time of the reference voltages simultaneously. The proposed sample- and-hold amplifier(SHA) is based on a highly linear common-drain amplifier and passive differential circuits to minimize power consumption and chip area with 8b accuracy and employs input dynamic common mode feedback circuits for high dynamic performance at a 200MHz sampling rate. A new encoding circuit in a coarse ADC simplifies the signal processing between the coarse ADC and two successive fine ADCs.

• Journal of the Institute of Electronics Engineers of Korea TE
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• 제37권5호
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• pp.11-116
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• 2000

A topology decreased switching loss and voltage stress by zero voltage switching is presented in this paper. Generally, Switching mode converting productes voltage stress and power losses due to excessive voltage and current. which affect to performance of power supply and reduce overall efficiency of equipments. Virtually, In flyback converter, transient peak voltage and current at switcher are generated by parasitic elements. To solve these problems, present ZVS flyback converter topology applied a auxiliary circuit. Incorporation of auxiliary circuit into a conventional flyback topology serves to reduce power losses and to minimize switching voltage stress. Snubber capacitor in auxiliary circuit serves ZVS state by control voltage variable time at turn on and off of main switch, then reduces voltage stress and power losses. The proposed converter has lossless switching in variable load condition with wide range. A detailed analysis of the circuit is presented and the operation procedure is illustrated. A (50W 100kHz prototype) ZVS flyback converter using a auxiliary circuit is built which shows an efficiency improvement as compared to a conventional hard switching flyback converter.

• Journal of the Institute of Electronics and Information Engineers
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• 제53권4호
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• pp.20-26
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• 2016

A wireless passive sensor network is a network which, by letting RF sources supply energy to sensor nodes, is - at least theoretically - able to live an eternal life without batteries. Due to the technological immaturity, however, a wireless passive sensor network still has many difficulties; energy scarcity, non-simultaneity of energy reception and data transmission and inefficiency in data transmission occurring at sensor nodes. Considering such practical constraints, in this paper, we propose an elementary MAC scheme supporting many sensor nodes to deliver packets to a sink node. Based on a time structure in which a charging interval for charging capacitors by using received and an acting interval for communicating with a sink node are alternately repeated, the proposed MAC scheme delivers packets to a sink node according to slotted ALOHA. In general, a contention-type scheme tends to exhibit relatively low throughput. Thus, we multilaterally evaluate the throughput performance achieved by the proposed MAC scheme using a simulation method. Simulation results show that the network-wide throughput performance can be enhanced by properly setting the length of acting interval.