• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.10
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• pp.31-39
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• 2004

This paper illustrates the noise characteristics under chip's core operations according to types of packages and modules for DDR DRAM For analyzing this, the impedance profiles and power noises are analyzed with DRAM chips having commercial TSOP package and commercial FBGA package on TSOP-based DIMM and FBGA-based DIMH In controversy with common concepts, we find that the noise-isolation characteristics of FBGA package are more weak and sensitive on transferred noises than those of the TSOP package. In addition, the simulated results show that the decoupling capacitor locations of modules are more important to control the self and transfer noise characteristics than the lead inductance of the packages. Therefore, satisfying the target spec of the noise suppression and isolation can be achieved through the design of power distribution systems only with considering not only the package types but also the whole module system.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.22 no.1
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• pp.327-332
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• 2021

At the package level, semiconductor reliability inspections involves mounting a semiconductor chip package on a test socket. The form of the test socket is basically determined by the form of the chip package. It also acts as a medium to connect with test equipment through mechanical contact of the leads and socket leads in the chip package, and it minimizes signal loss in a signal transmission process so that an inspection signal can be delivered well to the semiconductor. In this study, a technique was applied to examine the interdependence of adjacent electrical transfer routes and the structure of adjacent electrical transfer paths. The goal was to enable short-circuit testing of fewer than 100 silicon test sockets through a single interface for life tests and precision measurements. The test results of the developed device show a test precision of 99% or more and a simultaneous test speed characteristic of 0.66 sec or less.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.2 s.105
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• pp.178-183
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• 2006

The proposed triple-band compact chip antenna using coupled meander line and stacked meander structure for mobile RFID/PCS/WiBro. The proposed antenna is designed to operate at 900, 1,800, and 2,350 MHz, and is realized by parasitic coupled and stacked a meander line. Meander lines are using extend length of effective current path more than monopole and contribute miniaturization. The coupled meander line controls the excitations of the mobile RFID and PCS, stacked meander line controls the excitation of the WiBro. The fabricated antenna size is $10.98{\times}22.3{\times}0.98\;mm$. The resonance frequencies are 905 MHz, 1.77 GHz and 2.32 GHz. The impedance bandwidths are 24 MHz, 140 MHz and 92 MHz. The maximum gains of antenna are 0.34 dBi, 2.58 dBi and 0.4 dBi at resonance frequencies.

• Journal of IKEEE
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• v.19 no.3
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• pp.440-446
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• 2015

This study has examined susceptibility of LNA(Low Noise Amplifier) due to Front-Door Coupling under Narrow-Band high power electromagnetic wave. M/DFR(Malfunction/Destruction Failure Rate) was measured to investigate the diagnostic of IC test. In addition, decapsulation analysis was used to understand the inside of the chip state in LNA devices. The experiments is employed as an open-ended waveguide to study the destruction effects of LNA using a 2.45 GHz Magnetron as a high power electromagnetic wave. The susceptibility level of LNA was assessed by electric field strength, and its failure modes were observed. The malfunction of LNA device has showed as the type of self-reset and power-reset. The electric field strength of malfunction threshold is 524 V/m and 1150 V/m respectively. Also, he electric field of destruction threshold is 1530 V/m. Three types of damaged LNA were observed by decapsulation analysis: component, onchipwire, and bondwire destruction. Based on these results, the susceptibility of the LNA can be applied to a database to help elucidate the effects of microwaves on electronic equipment.

• Journal of the Microelectronics and Packaging Society
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• v.16 no.2
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• pp.11-19
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• 2009

Thermo-mechanical behaviors of wire-bond plastic ball grid array (WB-PBGA) package assemblies are characterized by high-sensitivity moire interferometry. Using the real-time moire setup, fringe patterns are recorded and analyzed for several temperatures. Experiments are conducted for three types of WB-PBGA package that have full grid pattern and perimeter pattern with/without central connections. Bending deformations of the assemblies and average strains of the solder balls are investigated, with an emphasis on the effect of solder interconnection grid patterns, Thermal strain distributions and the location of the critical solder ball in package assemblies are quite different with the form of solder ball grid pattern. For the WB-PBGA-PC, The largest of effective strain occurred in the inner solder ball of perimeter closest to the chip solder balls. The critical solder ball is located at the edge of the chip for the WB-PBGA-FG, at the most outer solder ball of central connections for the WB-PBGA-P/C, and at the inner solder ball closest to the chip for the WB-PBGA-P.

• Proceedings of the Korean Society of Dyers and Finishers Conference
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• 2011.11a
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• pp.52-52
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• 2011

PLA 섬유는 폴리머의 주성분이 옥수수에서 추출한 모노머를 중합한 화학섬유가 아닌 인체친화적인 식물성 소재이며 생분해성이 좋은 친환경 소재로 최근 주목받고 있는 섬유소재이다. 본 연구에서는 아토피완화용 여러 섬유 구조체 개발에서 사용되는 섬유소재중 PLA 원사에 항균성 물질을 혼입하여 PLA 항균사 제조를 위한 연구를 수행하였다. PLA Grade의 점도가 낮아질수록 Grade별 용융 지수값은 차이를 나타내지만 방사온도 $230^{\circ}C$를 변곡점으로 하여 용융점도가 급격히 변하였으며, 특히 방사온도 $240^{\circ}C$의 경우 용융지수가 100을 넘어가고 폴리머의 색깔이 황갈색을 띄어 폴리머의 열분해가 많이 일어났을 것으로 판단되었다. PLA의 적정 방사온도 구간은 $210{\sim}225^{\circ}C$ 구간이 최적이며 그 이상에서는 Color 변화 및 물성 저하가 나타나는 것으로 판단되었다. 항균성 PLA 섬유를 제조하기 위하여 피톤치드계 유기항균제를 이용하였으며, 피톤치드에 기능성 엘라스토머를 사용하여 Capsulation을 진행하였다. 이러한 유기항균제 Powder의 경우 비중이 낮아 표면적로 인하여 마스터배치 칩을 만드는 공정에서 잘 혼합되지 않는 문제점이 발생하였으나, 피톤치드의 함량을 조절하여 PLA와의 마스터배치 칩 제조를 시험하였다. 압출온도와 토출량, Screw 조건(Mixing, Zone)을 시험하여 적정 조건을 설정하였다. 항균사 PLA 섬유는 Sheath/Core 복합방사 형태와 단독사 형태의 2가지 Type을 제조하였다. Sheath/Core 복합방사 폴리머 구성은 Sheath부에 PLA항균사, Core부에 PLA 또는 저융점 PET를 사용하였다. Core부의 폴리머는 제사성에 큰 영향을 미치지 않았으나, 항균 마스터배치의 함량이 증가할수록 Pack압 상승이 급격히 일어나는 단점이 나타났다. 항균제 5% 정도가 혼입되어 있는 경우에 2.1 이상의 정균활성치와 99.8% 정도의 정균감소율 성능을 나타내었다. PLA 단독사의 경우, 항균제 최적 함량은 3% 이상으로 정균활성치 5.5 이상, 정균감소율 99.9%의 우수한 항균특성을 나타내었다.

• Resources Recycling
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• v.30 no.2
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• pp.61-67
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• 2021

Scraps are a byproduct of the machining process used for transforming titanium ingots into useful mechanical parts. Scraps take two forms, namely, bulky scraps, which are produced by cutting, and chipped scraps, which are produced by milling. Bulky scraps are comparatively easier to recycle because of their small surface area and less oxygen content; as a result, they pose only a small risk of explosion. In contrast, chipped scraps pose a higher risk of explosion, because of which, their recycling is complicated, resulting in most such scraps being discarded. With the aim of avoiding this waste, we proposed a novel process for converting chipped scraps into stable carbide materials. Methods typically applied to reduce particle size and impair the formation of solid solution type phase in the carbide materials were used to improve the mechanical properties of carbides prepared from chipped scraps. Our novel recycling process reduced carbide production costs and improved carbide quality.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.14 no.5
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• pp.442-452
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• 1989

This Paper describes the impleentation of two's complement bit-serial FIR filter with systolic architectur. The filter coefficients are represented as sign and magnitude form and the input data is represented as two's complement form. We use systolic array to obtain high operation speed so this FIR filter sucessfully operates in real-time environment.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.418-418
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• 2014

나노임프린트 공정으로 제작된 동일한 형태의 패턴 구조를 변형하거나, 표면의 특성을 조절하는 것은 임프린트 공정의 응용성을 높일 수 있는 유용한 기술이다. 본 연구진은 플라즈마와 열처리를 통하여 임프린트 나노패턴의 크기를 변형하는 연구[1]와 나노구조의 형태에 따른 표면특성의 변화 연구[2]를 수행한 바 있는데, 본 연구에서는 나노임프린트 패턴의 구조 및 표면특성을 단일 칩 내에서 연속적으로 변화하도록 제작하는 방법에 관해 고찰하였다. 나노임프린트 공정으로 제작한 패턴을 반응성이 연속적으로 변화하도록 고안된 산소 플라즈마 장치에서 식각하여 구조를 연속적으로 변형하고, 전자현미경(SEM)과 원자힘현미경(AFM), 집속이온빔(FIB) 등을 통해 표면과 단면을 확인하였으며, 구조변형 이후의 후처리에 따른 접촉각 등의 변화를 관찰하여 임프린트 나노구조 패턴 표면의 화학적 특성을 조절하는 방법을 탐구하였다. 본 연구 결과는 단일한 모 패턴으로부터 다양한 크기의 패턴을 제작하고 화학적 특성을 조절하는 것이 가능함을 보이는 것으로서, 향후 이러한 연속적 변화를 갖는 미세구조를 이용하여 혼합 물질의 분리 및 바이오 물질의 검출 등에 응용할 수 있을 것으로 기대된다.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.3178-3180
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• 1999

초음파 진단기의 신호처리에 필요한 8-b 해상도와 40MS/s 이상의 변환속도를 갖는 ADC를 Folding and Interpolating 형태로 설계했다. 전력소모와 입력단의 오프셋에 의한 영향을 줄이기 위해 프리엠프의 출력을 Interpolation하여 그 개수를 절반으로 줄임으로써 전력소모를 줄였고, 기존의 전압모드 Interpolation 회로에서의 단순한 source follower를 정궤환을 이용한 버퍼의 형태로 바꾸어 이득을 개선시킴으로써 전압의 이용율을 높일 수 있었다. ADC에서 가장 중요한 비교기를 설계함에 있어서는 다이나믹 전력 소모만 있는 구조에 킥-백 노이즈를 줄이기 위한 설계를 했다 $0.6{\mu}m$ CMOS 공정을 이용해 설계되었고, Layout 결과 칩의 면적은 $1.3mm{\times}1.3mm$. 모의 실험결과 40MS/s에서 70mw의 전력을 소모하였다.