• The Journal of Korean Institute of Information Technology
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• v.17 no.3
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• pp.43-50
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• 2019

In this paper, we propose a S-band oscillator with a reduced electrical size by applying a vertical split ring resonator(VSRR). The VSRR is a type of split ring resonator that operates as a resonator by the capacitance and inductance generated between the microstrip lines arranged on the top and bottom of the dielectric substrate and it has an advantage that the electrical size of the resonance circuit can be reduced as compared with the conventional ring resonator. In this paper, we design a VSRR operating over S-band and an oscillator using the VSRR as the resonant circuit. The proposed oscillator showed the output of 5.9dBm at 2.4HGz and showed the phase noise characteristics of -112.58dBc at 100KHz offset frequency and -117.85dBc at 1MHz offset.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.5A
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• pp.432-440
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• 2011

For the 4th generation mobile communication, LTE-advanced system needs the broad frequency band up to 100MHz for providing the data rate of maximum 1Gpbs. However, it is very difficult to secure the broad frequency band in the current frequency allocation situation. So, carrier aggregation was proposed as the solution, in which several fragmented frequency bands are used at the same time. Basically, multiple parallel receivers are required to get the information data from the different frequency bands but this conventional multi-chain receiver system is very inefficient. Therefore, in this paper, we like to study the single chain system that is able to receive the multi-band signals in a single receiver based on the time division multiplexing (TDM) reception method. This proposed TDM receiver efficiently manage to receive the multi-band signals in time domain and handle the baseband signals with one DSP board. However, the serious distortion could be generated by the sampling timing offset (STO) in the TDM-based system. Therefore, we like to analyze STO effects in the TDM-based system and propose a compensation method using estimated STO. Finally, it is shown by simulation that the proposed method is appropriate for the single chain receiver and show good compensation performance.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.5
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• pp.471-482
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• 2015

In this paper, design and implementation of the 94 GHz Gunn oscillator and the evaluation of the maximum power of the Gunn diode used in the oscillator are presented. The 94 GHz Gunn oscillator is used InP Gunn diode and designed employing a WR-10 waveguide. The designed oscillator is fabricated through machining and its performance is measured. The fabricated oscillator shows an oscillation frequency of 95 GHz, output power of 12.64 dBm, and phase noise of -92.7 dBc/Hz at 1 MHz offset frequency. To evaluation the maximum power of the InP Gunn diode used in oscillator, the oscillator structure is modified to a structure having a diaphram. The height of thick diaphram which is used in the oscillator is varied. As a result, an oscillator has several different load impedances, which makes it possible to plot $G_L-V^2$ plot at the post plane. Using the $G_L-V^2$ plot, the maximum power of used Gunn diode including post is computed to be 16.8 dBm. Furthermore using the shorted and zero bias Gunn diode, the post loss used for DC biasing can be computed. Using the two losses, The maximum power of a InP Gunn diode is computed to be 18.55 dBm at 95 GHz. This result is close to a datasheet.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.38 no.12
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• pp.1223-1231
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• 2010

The design is presented for a SATCOM antenna capable of simultaneous multi-band (X/Ku/Ka-Band) communications without replacement of feed horns or change of other parts in the application as a ground satellite terminal for large data transfer. The antenna is the offset configuration and consists of a dual-band(X/Ka-band) feed horn, a single-band(Ku-band) feed horn, a frequency selective surface(FSS) sub-reflector and a parabolic main-reflector. The antenna has a main reflector defining a prime focus and a frequency selective surface sub-reflector defining an image focus. A dual-band feed and a single-band feed are provided at each of the prime focus and image focus. The antenna is designed using 3D EM simulator and the gains measured in X/Ku/Ka-band of the complete antenna assembly is more than 31.6dBi, 36.8dBi, 40.8dBi, and the cross polarization is 21.7dB, 26.6dB, 25.2dB, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.2
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• pp.335-342
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• 2016

This paper proposes efficient hardware structure of in-loop filter for a high-performance HEVC (High Efficiency Video Coding) encoder. HEVC uses in-loop filter consisting of deblocking filter and SAO (Sample Adaptive Offset) to improve the picture quality in a reconstructed image due to a quantization error. However, in-loop filter causes an increase in complexity due to the additional encoder and decoder operations. A proposed in-loop filter is implemented as a three-stage pipeline to perform the deblocking filtering and SAO operation with a reduced number of cycles. The proposed deblocking filter is also implemented as a six-stage pipeline to improve efficiency and performs a new filtering order for efficient memory architecture. The proposed SAO processes six pixels parallelly at a time to reduce execution cycles. The proposed in-loop filter encoder architecture is designed by Verilog HDL, and implemented by 131K logic gates in TSMC $0.13{\mu}m$ process. At 164MHz, the proposed in-loop filter encoder can support 4K Ultra HD video encoding at 60fps in real time.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.8
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• pp.53-59
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• 2008

In this paper, a novel dual-band high-efficiency class-F power amplifier using the composite right/left-handed (CRLH) transmission lines (TLs) has been realized with one RF Si lateral diffusion metal-oxide-semiconductor field effect transistor (LDMOSFET). The CRLH TL can lead to metamaterial transmission line with the dual-band tuning capability. The dual-band operation of the CRLH TL is achieved by the frequency offset and the nonlinear phase slope of the CRLH TL for the matching network of the power amplifier. Because the control of the all harmonic components is very difficult in dual-band, we have managed only the second- and third-harmonics to obtain the high efficiency with the CRLH TL in dual-band. Also, the proposed power amplifier has been realized by using the harmonic control circuit for not only the output matching network, but also the input matching network for better efficiency. Two operating frequencies are chosen at 880 MHz and 1920 MHz in this work. The measured results show that the output power of 39.83 dBm and 35.17 dBm was obtained at 880 MHz and 1920 MHz, respectively. At this point, we have obtained the power-added efficiency (PAE) of 79.536 % and 44.04 % at two operation frequencies, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.21-31
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• 2010

This paper presents a design of PLL and SSCG for reducing the EMI effect at the electronic machinery and tools for DisplayPort application. This system is composed of the essential element of PLL and Charge-Pump2 and Reference Clock Divider to implement the SSCG operation. In this paper, 270MHz/162MHz dual-mode PLL that can provide 10-phase and 1.35GHz/810MHz PLL that can reduce the jitter are designed for 2.7Gbps/162Gbps DisplayPort application. The jitter can be reduced drastically by combining 270MHz/162MHz PLL with 2-stage 5 to 1 serializer and 1.35GHz PLL with 2 to 1 serializer. This paper propose the frequency divider topology which can share the divider between modes and guarantee the 50% duty ratio. And, the output current mismatch can be reduced by using the proposed charge-pump topology. It is implemented using 0.13 um CMOS process and die areas of 270MHz/162MHz PLL and 1.35GHz/810MHz PLL are $650um\;{\times}\;500um$ and $600um\;{\times}\;500um$, respectively. The VCO tuning range of 270 MHz/162 MHz PLL is 330 MHz and the phase noise is -114 dBc/Hz at 1 MHz offset. The measured SSCG down spread amplitude is 0.5% and modulation frequency is 31kHz. The total power consumption is 48mW.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.8 s.338
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• pp.33-40
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• 2005

This paper presents a structure of the searcher using a diversity in array antenna systems operating in the cdma2000 1x signal environments. The new technique exploits the fact that the In-phase and quadrature components of interferers can respectively be viewed as an independent gaussian noise at each antnna element in most practical cdma signal environments. The proposed PN acquisition scheme is a singles-dwell PN acquisition system consisting of two stages, that is, the searching stage and the verification stage. The searching stage independently correlates the receiver multiple signals with PN generator of each antenna element for obtaining the synchronous energy at the entire region. Then, the searching results of each antenna element are non-coherently combinind. The verification stage compares the searching energy with the optimal threshold, which is predesigned in the lock detector, and decides whether the acquisition is successful or fail. In this paper, we analyzed the effect of tile diversity order to determine the mean acquisition time. In general, it is known that the mean acquisition time significantly decrease as the number of antenna elements increases. But, as the diversity order goes up, the enhancement of the performance is saturated. Therefore, to decrease the mean acquisition time of the searcher, we must design the optimal array antenna systems by considering the operating SNR range of the receiver, the probability of detection $P_D$ and that of false alarm $P_{FA}$ . The Performance of the proposed PN acquisition scheme is analyzed in frequency selective Rayleigh fading channels. In this paper, the effect of the number of antenna elements on PN acquisition scheme is shown according to the probability of detection $P_D$ and that of false alarm $P_{FA}$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.7 s.98
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• pp.671-680
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• 2005

The CFL linearisation chip which is one of key devices in ultra-narrowband mobile radio transmitter using CQPSK digital modulation method is designed and implemented with $0.35{\mu}m$ CMOS technology. The reduced size and low cost of transmitter are available by the use of direct-conversion and CFL ASIC chip, which improve the power effi챠ency and linearity of transmitting path. In addition, low power operation is possible through CMOS technology The performance test results of transmitter show -25 dBc improvement of IMD level at the 3 kHz frequency offset and then satisfy FCC 47 CFR 90.210 E emission mask in the operation of CFL ASIC chip. At that time, the transmitting power is about PEP(Peak-to-Envelope Power) 5 W. The main parameters to improve the transmitting characteristic and to compensate the distortion in feed back loop such as DC-offset, loop gain and phase value are interfaced with notebook PC to be controlled with S/W.

• Geophysics and Geophysical Exploration
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• v.6 no.2
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• pp.57-63
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• 2003

For the dectection of small cavity in the hard rock, we investigated the feasibility of crosswell travel-time tomography and Kirchhoff migration technique. In travel-time tomography, first arrival anomaly caused by small cavity was investigated by numerical modeling based on the knowledge of actual field information. First arrival delay was very small (<0.125 msec) and detectable receiver offset range was limited to 4m with respect to $1\%$ normalized first arrival anomaly. As a consequence, it was turned out that carefully designed survey array with both sufficient narrow spatial spacing and temporal (<0.03125 msec) sampling were required for small cavity detection. Also, crosswell Kirchhoff migration technique was investigated with both numerical and real data. Stack section obtained by numerical data shows the good cavity image. In crosswell seismic data, various unwanted seismic events such as direct wave and various mode converted waves were alto recorded. To remove these noises und to enhance the diffraction signal, combination of median and bandpass filtering was applied and prestack and stacked migration images were created. From this, we viewed the crosswell migration technique as one of the adoptable method for small cavity detection.