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Design of CFL Linearisation Chip for the Mobile Radio Using Ultra-Narrowband Digital Modulation  

Chong Young-Jun (Radio Tecnology Group, ETRI)
Kang Min-Soo (Radio Tecnology Group, ETRI)
Yoo Sung-Jin (Radio Tecnology Group, ETRI)
Chung Tae-Jin (Radio Tecnology Group, ETRI)
Oh Seung-Hyeub (Dept. of Electronics Engineering, Chungnam University)
Publication Information
The Journal of Korean Institute of Electromagnetic Engineering and Science / v.16, no.7, 2005 , pp. 671-680 More about this Journal
Abstract
The CFL linearisation chip which is one of key devices in ultra-narrowband mobile radio transmitter using CQPSK digital modulation method is designed and implemented with $0.35{\mu}m$ CMOS technology. The reduced size and low cost of transmitter are available by the use of direct-conversion and CFL ASIC chip, which improve the power effi챠ency and linearity of transmitting path. In addition, low power operation is possible through CMOS technology The performance test results of transmitter show -25 dBc improvement of IMD level at the 3 kHz frequency offset and then satisfy FCC 47 CFR 90.210 E emission mask in the operation of CFL ASIC chip. At that time, the transmitting power is about PEP(Peak-to-Envelope Power) 5 W. The main parameters to improve the transmitting characteristic and to compensate the distortion in feed back loop such as DC-offset, loop gain and phase value are interfaced with notebook PC to be controlled with S/W.
Keywords
CFL Chip; APCO P25; CQPSK; Digital Ultra-Narrowband;
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