• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.12
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• pp.24-30
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• 1996

In this paper, we designed a new type of high frequency on-chip voltage controlled oscillator (VCO) using GaAs MESFET, and their performances were comapred with those of the conventional VCO. Each VCO was designed with three-to-five ring oscillator and inverter, buffer and NOR gate were implemented by GaAs source coupled FET logic, which has better speed and noise performance compared to other GaAs MESFET logic. SPICE simulation showed that the gain of conventional and our new VCO was 1.24[GHz/V], 0.54[GHz/V], respectively. The frquency tuning range were 2.31 to 3.55 [GHz] for conventional VCO and 2.47 to 3.01[GHz] for our new design. This shows that the factor of two gain reductin was achieved without too much sacrifice in the oscillation frequency. For our new VCO, the average temperature index was -2[MHz/.deg. C] in the range of -20~85[.deg. C] the power supply noise index was 5[MHz/%] for 5.3[V].+-.10[%] and total power consumption was 60.58[mW].

• Proceedings of the IEEK Conference
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• 2003.11c
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• pp.32-36
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• 2003

In this work, we have designed a fully integrated 2.4GHz LC-tuned voltage-controlled oscillator (VCO) with multiple tuning inputs for a 0.25-$\mu\textrm{m}$ standard CMOS process. The design of voltage-controlled oscillator is based on an LC-resonator with a spiral inductor of octagonal type and pMOS-varactors. Only two metal layer have been used in the designed inductor. The frequency tuning is achieved by using parallel pMOS transistors as varactors and back-gate tuned pMOS transistors in an active region. Coarse tuning is achieved by using 3-bit pMOS-varactors and fine tuning is performed by using back-gate tuned pMOS transistors in the active region. When 3-bit digital and analog inputs are applied to the designed circuits, voltage-controlled oscillator shows the tuning feature of frequency range between 2.3 GHz and 2.64 GHz. At the power supply voltage of 2.5 V, phase noise is -128dBc/Hz at 3MHz offset from the carrier. Total power dissipation is 7.5 mW.

• Journal of Navigation and Port Research
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• v.28 no.6
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• pp.497-501
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• 2004

In this paper, it is presented a level sensor for measuring a level of the contents of cargo tank using frequency modulated continuous wave(FMCW). The frequency range is 10∼11 GHz, the radar cross section(RCS) of test target is $0.8\textrm{m}^2$ of metal plate. The experiment is performed in laboratory and open ground, the sweep time of the signal is 100 ms, the pyramidal horn antenna of about 22 dBi gain is used, and input power of antenna is about 8 dBm The beat frequency according to the target moving to 40 m is measured. There is a good agreement between measured and calculated results. But the resolution of the FMCW radar is measured about 10 cm due to nonlinear of voltage controlled oscillator(VCO).

• Journal of the Korean Institute of Telematics and Electronics
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• v.10 no.2
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• pp.7-15
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• 1973

The operation behaviors of negative-resistance multivibrators. are described. The oscillation phenomena in monostable and bistable mode negative-resistance circuits are analyzed by using a analog computer. It is presented that voltage-controlled negative -resistance switching circuits may be in oscillation state for a time or parmanently by adding the bias voltage or trigger pulse. The results show that the care must be taken for this fact in the constructions of negative resistance switching circuits.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.941-944
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• 2015

In this paper study for VSAT(very small aperture terminal) LNB(low noise block). ship LNB was demanded high stability and low noise figure. We designed FEM(Front-End Module) that was operated multi-band. FEM designed was constructed in a multi-band low noise receiver amplifier, a frequency converter, IF amplifier, Voltage Control Oscillator signal generating circuit four circuit using. To convert the multi-band 2.05GHz band, it generates four local oscillator signals, the four(band1, band2, band3, band4) designed to output an IF signal developed conversion apparatus, the conversion gain 64dB, noise figure 1dB or less, output P1dB 15dBm or more, phase noise showed -73dBc@100Hz.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.42 no.1
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• pp.23-31
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• 2005

Recently, the multimedia and high speed telecommunication systems needs a high frequency and high stability oscillator. The VCXO(voltage controlled -crystal oscillator) have continually downsized to gratify a thin and small size of the telecommunication systems. In his paper, we have developed the small ceramic PECL(positive emitter-coupled logic) VCXO of the 5×7 mm size for gratifying the requested specifications from user, and then use the multilayer ceramic SMD(surface mounted device) package technology. The ceramic SMD PECL VCXO is operating at the 3.3 Voltage and have the frequency range of 120MHz～180MHz. The Q factor is over 5K and it has the low jitter characteristics of 3.5 ps and low phase noise.

• Journal of IKEEE
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• v.12 no.3
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• pp.176-183
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• 2008

The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device is proposed in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. DTMOS with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an error amplifier and a comparator circuit as a block. The Saw-tooth generator is made to have 1.2 MHz oscillation frequency and full range of output swing from ground to supply voltage(VDD:3.3V). The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device, achieved the high efficiency near 95% at 100mA output current. And DC-DC converter is designed with LDO in stand-by mode which fewer than 1mA for high efficiency.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.46 no.2
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• pp.72-77
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• 2009

In this paper, a 3.2Gb/s clock and data recovery (CDR) circuit for a high-speed serial data communication without the reference clock is described This CDR circuit consists of 5 parts as Phase and frequency detector(PD and FD), multi-phase Voltage Controlled-Oscillator(VCO), Charge-pumps (CP) and external Loop-Filter(KF). It is adapted the PD and FD, which incorporates a half-rate bang-bang type oversampling PD and a half-rate FD that can improve pull-in range. The VCO consists of four fully differential delay cells with rail-to-rail current bias scheme that can increase the tuning range and tuning linearity. Each delay cell has output buffers as a full-swing generator and a duty-cycle mismatch compensation. This materialized CDR can achieve wide pull-in range without an extra reference clock and it can be also reduced chip area and power consumption effectively because there is no additional Phase Locked- Loop(PLL) for generating reference clock. The CDR circuit was designed for fabrication using 0.18um 1P6M CMOS process and total chip area excepted LF is $1{\times}1mm^2$. The pk-pk jitter of recovered clock is 26ps at 3.2Gb/s input data rate and total power consumes 63mW from 1.8V supply voltage according to simulation results. According to test result, the pk-pk jitter of recovered clock is 55ps at the same input data-rate and the reliable range of input data-rate is about from 2.4Gb/s to 3.4Gb/s.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.2
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• pp.208-217
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• 2010

This paper presents a novel 10 GHz bio-radar system based on a frequency multiplier and phase-locked loop(PLL) for non-contact measurement of heartbeat and respiration rates. In this paper, a 2.5 GHz voltage controlled oscillator (VCO) with PLL is employed to as a frequency synthesizer, and 10 GHz continuous wave(CW) signal is generated by using frequency multiplier from 2.5 GHz signal. This paper also presents the noise characteristic of the proposed system. As a result, a better performance and economical frequency synthesizer can be achieved with the proposed bio-radar system. The experimental results shows excellent bio-signal measurement up to 100 cm without any additional digital signal processing(DSP), and the proposed system is validated.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.11 no.3
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• pp.106-113
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• 1997

In uninterruptible power supply(UPS), a high speed phase control is usually required to compensate transients in the output voltage at the instant of transfer from the ac line to the inverter when the ac line fails or backs to the ac line in case of the inverter fails. To overcome this problem, this paper pre¬sents the closed digital phase-locked loop(DPLL) techniques designed by full software with TMS320C31 digital signal processor and describes the functional operation of the proposed DPLL. Fi¬nally, the performance of the proposed DPLL is shown and discussed through simulation and experiment.