• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.85-86
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• 2011

철도운영효율 향상을 위하여 첨단 기술을 기반으로 하는 스마트 철도 기술에 대한 개발 및 실용화 사업이 전 세계적으로 진행중에 있다. 철도의 수송력 증대와 운영비용 감소 및 시스템 변경 용이성등의 장점을 극대화하기 위하여 기존의 궤도회로 중심의 열차제어 시스템에서 통신기술을 기반으로 하는 열차제어시스템으로의 전환을 위한 많은 연구가 이루어지고 있다. 본 논문에서는 CBTC 시스템에서 GPS시스템의 적용 타당성 여부를 검증하였고 CBTC 시스템에서의 위치 정보 수신을 위한 GPS 수신데이터의 정합 알고리듬에 관한 저전력 분할 연산 알고리듬을 설계하여, 본 논문에서 제안한 코드는 기존의 수신데이터의 정합알고리듬 대비 2% 면적이 감소하는 것을 확인할 수 있었으며, 또한 전력소모가 7% 감소되는 것을 확인할 수 있었다.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.5
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• pp.35-41
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• 2008

This paper presents the design method of current-mode signal processing for high speed and low power digital audio signal processing. The digital audio processor requires a digital signal processing such as fast Fourier transform (FFT), which has a problem of large power consumption according to the settled point number and high speed operation. Therefore, a current-mode signal processing with a switched Current (SI) circuit was employed to the digital audio signal processing because a limited battery life should be considered for a low power operation. However, current memory that construct a SI circuit has a problem called clock-feedthrough. In this paper, we examine the connection of dummy MOS that is the common solution of clock-feedthrough and are willing to calculate the relation of width between dummy MOS for a proposal of the design methodology for improvement of current memory. As a result of simulation, in case of that the width of memory MOS is 20um, ratio of input current and bias current is 0.3, the relation of width between switch MOS and dummy MOS is $W_{M4}=1.95W_{M3}+1.2$ for the width of switch MOS is 2~5um, it is $W_{M4}=0.92W_{M3}+6.3$ for the width of switch MOS is 5~10um. Then the defined relation of MOS transistors can be a useful design guidance for a high speed low power digital audio processor.

• The KIPS Transactions:PartD
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• v.18D no.3
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• pp.197-204
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• 2011

Set-top Box which receives broadcasting signal and delivers it to display device such as TV usually doesn't have low-power mode, standby power mode. On the other side, most consumer electronics support standby power mode. The main reasons come from technical barriers and operational stability. Set-top box normally consumes 80~90% power of active mode even though turning off. This is much higher compared to other consumer electronics which consume less than 1W in standby power mode. However, most developed countries including Korea are enforcing the regulations which enhance energy efficiency of set-top box. This paper describes design and development of low-power set-top box. Key technologies are SoC supporting low-power mode, system hardware and software operating in separated power mode, and middleware managing the power with broadcasting system. Finally, we show energy saving expectation through development and proliferation.

• Journal of the Institute of Convergence Signal Processing
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• v.15 no.2
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• pp.64-69
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• 2014

Ultrasound system is one of the complex wireless signal processing systems that are widely used in the fields of modern industry such as medical diagnostics, underwater communications, and sensor-networks. Miniaturization of ultrasound system has been raging recently. In this paper, a hybrid LNA that is suitable for miniaturization and mobile diagnostic ultrasound system has been developed. The proposed LNA has low noise figure of less than 5dB, and the feedback resistor is designed to be electrically adjusted in order to attain the impedance-matching for various ultrasound transducers. It supports the whole ultrasound frequencies from 10KHz to 150MHz frequency band and also provides sleep modes. A gain from -18.8 to -29.5 dB is achieved by adjusting each transducer to fit the system character. Power consumption can be reduced up to 90% in similar performance as compared to the existing LNA.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.7
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• pp.659-664
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• 2016

In this paper, we suggest operational trans-conductance amplifier(OTA) for current-mode FIR filter that can be used in a digital circuit system requiring high operating frequency and low power consumption. The current-mode signal processing is one of the very innovative design method for a low power consumption system with high operating frequency because it shows a constant power regardless of frequency. From the simulation result using 0.35um CMOS process, when Vdd is 2V, it is confirmed that the proposed circuit showed the dynamic range of the about 1V, about 50% of supply voltage and output current swing of about 0~200uA. Also, the power consumption was evaluated with about 21uW and the active size for an integration was measured with $71um{\times}166um$.

• Journal of IKEEE
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• v.26 no.2
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• pp.299-305
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• 2022

Analog-digital converter (ADC) should be one of the most important blocks that convert various physical signals to digital ones for signal processing in the digital signal domain. As most operations of the analog circuit for sensor signal processing have been replaced by digital circuits, high-resolution performance is required for ADC. In addition, low-power must be the critical issue in order to extend the battery time of mobile system. The existing integrating sigma-delta ADCs has a characteristic of high resolution, but due to its low supply voltage condition and advanced technology, circuit error and corresponding resolution degradation of ADC result from the finite gain of the operational amplifier in the integrator. Buffer compensation technique can be applied to minimize gain errors, but there is a disadvantage of additional power dissipation due to the added buffer. In this paper, incremental signal-delta ADC is proposed with buffer switching scheme to minimize current and igh-pass bias circuit to improve the settling time.

• Journal of Sensor Science and Technology
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• v.3 no.1
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• pp.54-60
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• 1994

In this paper, the multi-sensor signal processing IC is designed. It consists of an analog multiplexer for selection of multi-sensor signals, active filters for noise rejection and signal amplification, and a sample and hold circuit for interface with digital signal processing. By implementing these circuits with CMOS transistors, integration, low power dissipation and miniaturization of the total signal processing system have been made possible.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.440-447
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• 2002

This paper considerated about exact flow volume calculation method from factors having an influence on measurement and introduced in anesthesia ventilator realized spirometry system. System used differential pressure sensing method with factors, that is temperature, pressure, gas density, humidity and mucus etc. System optimized for low power system for mobile system. System composed analog interface part, signal processing part, display part. Analog interface part have differential pressure flow sensor and defferential pressure sensor. Signal processing part have AVR processor for low power system display part use serial port (RS232, SPT). so it display at pc monitor or send to anesthesia ventilator. System is stable by linearizing 2th characteristics of flow-differential pressure, auto correction of sensor. Noise reduced by algorithm with analog filter and digital processing. Small, light, low power system is good at mobile system and applied to patient in emergency or mobile. and, System is useful at anesthesia ventilator by using flow sensor.

• The Journal of the Korea Contents Association
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• v.7 no.1
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• pp.147-154
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• 2007

In this paper, we propose a new parallel search algorithm to acquire synchronization for UWB(Ultra Wideband) systems that reduces computation of the correlation. The conventional synchronization acquisition algorithms check all the possible signal phases simultaneously using multiple correlators. However it reduces the acquisition time, it makes high power consumption owing to increasing of correlation. The proposed algorithm divides the preamble signal to input the correlator into an m-bit bunch. We check the result of the correlation at first stage of an m-bit bunch data and predict whether it has some synchronization acquisition information or not. Thus, it eliminates the unnecessary operation and save the number of correlation. We evaluate the proposed algorithm under the AWGN and the multi-Path channel model with MATLAB. The proposed parallel search scheme reduces number of the correlation 65% on the AWGN and 20% on the multi-path fading channel.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.7
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• pp.455-463
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• 2001

In this Paper, an approximate processing method is proposed and tested. The proposed method uses variable CSD (VCSD) coefficients which approximate filter stopband attenuation by controlling the precision of the CSD coefficient sets. A decimation filter for Audio Codec '97 specifications has been designed having processor architecture that consists of program/data memory, arithmetic unit, energy/level decision, and sinc filter blocks, and fabricated with 0.6${\mu}{\textrm}{m}$ CMOS sea-of-gate technology. For the combined two halfband FIR filters in decimation filter, the number of addition operations were reduced to 63.5%, 35.7%, and 13.9%, compared to worst-case which is not an adaptive one. Experimental results show that the total power reduction rate of the filter is varying from 3.8 % to 9.0 % with respect to worst-case. The proposed approximate processing method using variable CSD coefficients is readily applicable to various kinds of filters and suitable, especially, for the speech and audio applications, like oversampling ADCs and DACs, filter banks, voice/audio codecs, etc.