• Title/Summary/Keyword: 저전력 기법

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Performance of OFDM MMoF System considering Nonlinearity of OSSB Modulation (OSSB 변조의 비선형성을 고려한 OFDM MMoF 시스템의 성능)

  • Kim Chang-Joong;Lee Ho-Kyoung
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.3 s.345
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    • pp.27-31
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    • 2006
  • Millimeter over Fiber (MMoF) technique modulates millimeter wave signal optically to transmit it through an optical fiber for long distances with small loss. MMoF system usually uses optical single sideband (OSSB) modulation scheme to reduce fiber chromatic dispersion and obtain high bandwidth efficiency. The optical link of MMoF system using OSSB is treated as a nonlinear amplifier, and the AM/AM characteristic function of the amplifier is a Bessel function of the first kind of order 1. In this paper, we investigate the performance of OFDM MMoF system considering nonlinearity of OSSB modulation. We estimate a power of the nonlinear distortion noise to analyze the theoretical bit error rate(BER), and perform a simulation to verify the theoretical BER.

Harmonic ACK Transmissions from Multiple Gateway considering the Quasi-Orthogonal Characteristic of LoRa CSS Spreading Factors (LoRa CSS 확산 인자의 준직교 특성을 고려한 수신응답의 다중 게이트웨이 조화 전송 기법)

  • Byeon, Seunggyu
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.6
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    • pp.897-906
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    • 2022
  • In this paper, we propose a novel MAC protocol based on the harmonic transmission of ACK, called HAT-LoRa, for improving the reliability and the utilization in multiple gateway LoRa Networks. LoRa is basically vulnerable to collision due to the primitive pure ALOHA-like MAC. Whereas data frame delivery can be guaranteed by the transparent bridge of multiple receiving gateways, ACK is still transmitted by a single gateway in LoRa Network. HAT-LoRa provides the augmented reception opportunity of ACK via the simultaneous transmissions of identical ACK in multiple spreading factors. The proposed method reduces the expected transmission times of ACK double gateway environment as well as single gateway environment, by 55 and 60% in maximum, by 35% and 40% in average, in a single- and double-gateway environment, respectively. Especially, it outperforms under the environment where the distance between end device and gateways are similar to each other.

A Study on the Performance of Home Embedded System Using a Wireless Mesh Network (무선 메쉬 네트워크를 이용한 홈 임베디드 시스템의 성능에 대한 연구)

  • Roh, Jae-Sung;Ye, Hwi-Jin
    • Journal of Digital Contents Society
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    • v.8 no.3
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    • pp.323-328
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    • 2007
  • Communication systems beyond 3G should provide more than 100 Mbps for wireless access. In addition to smart antennas, wireless multi-hop networks are proposed to increase the cell size and throughput. For example, Zigbee technology is expected to provide low cost and low power connectivity and can be implemented in wireless mesh networks larger than is possible with Bluetooth. Also, home embedded system using wireless mesh network is one of the key market areas for Zigbee applications. If the line-of-sight path is shadowed by home obstacles, a direct connection between the access point (AP) and the node is not possible at high frequencies. Therefore, by using multi-hop relay scheme the end node can be reached to AP. In this paper, the relaying of data between the AP and the end node is investigated and the throughput and PER(Packet Error Rate) are evaluated in multi-hop wireless mesh networks by using DSSS/BPSK system.

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Adaptable PANID Generation Scheme for Resolving Address Conflict Based on Hash Mechanism in IoT Environment (IoT 환경을 위한 Hash 기반 동적 Zigbee PANID 생성 및 충돌 회피 방안)

  • Lee, Jaeho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.12
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    • pp.2392-2400
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    • 2015
  • Zigbee, which was a representative standard technology for dealing low energy and mesh networks in large deployment area such as smart home, smart building, and massive sensor networks, has been developed and deployed for increasing communication area by using Ad hoc method. It has been originally developed based on IEEE 802.15.4 standard so every node needs 48bit unique address defined by IEEE. However, it is absolutely inefficient to assign an unique address to every communication node where it would be deployed through large-scale network area, e.g., smart lighting and massive sensor networks, because there could be variously multiple companies to deploy network infrastructure and they could have different policy to assign node ID. To prevent the problem, this paper proposes a method of dynamic PANID assignment in overall Personal Coordinators, and also proposes a method for addressing PANID conflict problem which could be derived from dynamic PANID assignment.

Design Optimization Techniques for the SSD Controller (SSD 컨트롤러 최적 설계 기법)

  • Yi, Doo-Jin;Han, Tae-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.8
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    • pp.45-52
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    • 2011
  • Flash memory is becoming widely prevalent in various area due to high performance, non-volatile features, low power, and robust durability. As price-per-bit is decreased, NAND flash based SSDs (Solid State Disk) have been attracting attention as the next generation storage device, which can replace HDDs (Hard Disk Drive) which have mechanical properties. Especially for the single package SSD, if channel number or FIFO buffer size per channel increases to improve performance, the size of a controller and I/O pin count will increase linearly with channel numbers and form factor will be affected. We propose a novel technique which can minimize form factor by optimizing the number of NAND flash channels and the size of interface FIFO buffer in the SSD. For SSD with 10 channel and double buffer, the experimental results show that buffer block size can be reduced about 73% without performance degradation and total size of a controller can be reduced about 40% because control block per channel and I/O pin count decrease according to decrease channel number.

A Design and Implementation of modified ZigBee using the Directed-Messaging for Energy Efficiency Improvement (에너지 효율성 향상을 위하여 방향성 메시징을 사용하는 수정된 지그비의 설계 및 구현)

  • Khil, A-Ra
    • Journal of the Korea Society of Computer and Information
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    • v.17 no.10
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    • pp.99-105
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    • 2012
  • ZigBee is the low power, low cost and low data rate wireless personal area network(LR-WPAN) standard. The Directed-Messaging is the protocol which improves the energy efficiency through reducing the redundant message transmission by transmitting messages with directional information toward the specified sub-network area in wireless sensor network using broadcasting. In this paper, we design and implement the experimental grid sensor network using ZigBee modified by the Directed-Messaging for the energy efficiency improvement. The experimental sensor network in this paper is configured with Nano24 supporting the ADV message and the routing management module modified to use the directional information. The energy efficiency improvement of the experimental sensor-network by evaluating the experimental results according to transmitting ADV message.

Low-Power IoT Microcontroller Code Memory Interface using Binary Code Inversion Technique Based on Hot-Spot Access Region Detection (핫스팟 접근영역 인식에 기반한 바이너리 코드 역전 기법을 사용한 저전력 IoT MCU 코드 메모리 인터페이스 구조 연구)

  • Park, Daejin
    • IEMEK Journal of Embedded Systems and Applications
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    • v.11 no.2
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    • pp.97-105
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    • 2016
  • Microcontrollers (MCUs) for endpoint smart sensor devices of internet-of-thing (IoT) are being implemented as system-on-chip (SoC) with on-chip instruction flash memory, in which user firmware is embedded. MCUs directly fetch binary code-based instructions through bit-line sense amplifier (S/A) integrated with on-chip flash memory. The S/A compares bit cell current with reference current to identify which data are programmed. The S/A in reading '0' (erased) cell data consumes a large sink current, which is greater than off-current for '1' (programmed) cell data. The main motivation of our approach is to reduce the number of accesses of erased cells by binary code level transformation. This paper proposes a built-in write/read path architecture using binary code inversion method based on hot-spot region detection of instruction code access to reduce sensing current in S/A. From the profiling result of instruction access patterns, hot-spot region of an original compiled binary code is conditionally inverted with the proposed bit-inversion techniques. The de-inversion hardware only consumes small logic current instead of analog sink current in S/A and it is integrated with the conventional S/A to restore original binary instructions. The proposed techniques are applied to the fully-custom designed MCU with ARM Cortex-M0$^{TM}$ using 0.18um Magnachip Flash-embedded CMOS process and the benefits in terms of power consumption reduction are evaluated for Dhrystone$^{TM}$ benchmark. The profiling environment of instruction code executions is implemented by extending commercial ARM KEIL$^{TM}$ MDK (MCU Development Kit) with our custom-designed access analyzer.

Real-Time Support on the Tablet PC Platform (태블릿 PC 환경의 실시간 처리 기능 지원)

  • Park, Ji-Yoon;Jo, Ah-Ra;Kim, Hyo-Joung;Choi, Jung-Hyun;Heo, Yong-Kwan;Jo, Han-Moo;Lee, Cheol-Hoon
    • The Journal of the Korea Contents Association
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    • v.13 no.11
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    • pp.541-550
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    • 2013
  • Generally in case of tablet PC's, the Windows 8 is used to support various functions or development convenience, however it cannot support real-time processing. In addition, existing commercial solutions and RTiK has a problem to support real-time processing due to impossibility of getting APIC timer count value which is used to generate timer interrupt separated from that of Windows. Thus, in this paper, we set the initial APIC count value using MSR_FSB_FREQ to support real-time processing on the Windows 8-based tablet PC's. Additionally, we deal with designing and implementing RTiK+ providing real-time processing to guarantee interrupt periods by controlling C-State which is used for low power techniques. To evaluate the performance of the proposed RTiK+, we measured the periods of generated real-time threads using RDTSC instructions which return the number of CPU clock ticks, and verified that RTiK+ operates correctly within the error ranges of 1ms.

Flash-Conscious Storage Management Method for DBMS using Dynamic Log Page Allocation (동적 로그 페이지 할당을 이용한 플래시-고려 DBMS의 스토리지 관리 기법)

  • Song, Seok-Il;Khil, Ki-Jeong;Choi, Kil-Seong
    • Journal of Advanced Navigation Technology
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    • v.14 no.5
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    • pp.767-774
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    • 2010
  • Due to advantages of NAND flash memory such as non-volatility, low access latency, low energy consumption, light weight, small size and shock resistance, it has become a better alternative over traditional magnetic disk drives, and has been widely used. Traditional DBMSs including mobile DBMSs may run on flash memory without any modification by using Flash Translation Layer (FTL), which emulates a random access block device to hide the characteristics of flash memory such as "erase-before-update". However, most existing FTLs are optimized for file systems, not for DBMSs, and traditional DBMSs are not aware of them. Also, traditional DBMSs do not consider the characteristics of flash memory. In this paper, we propose a flash-conscious storage system for DBMSs that utilizes flash memory as a main storage medium, and carefully put the characteristics of flash memory into considerations. The proposed flash-conscious storage system exploits log records to avoid costly update operations. It is shown that the proposed storage system outperforms the state.

Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems Using Efficient Slack Time Analysis (효율적인 슬랙 분석 방법에 기반한 경성 실시간 시스템에서의 동적 전압 조절 방안)

  • 김운석;김지홍;민상렬
    • Journal of KIISE:Computer Systems and Theory
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    • v.30 no.12
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    • pp.736-748
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    • 2003
  • Dynamic voltage scaling(DVS), which adjusts the clock speed and supply voltage dynamically, is an effective technique in reducing the energy consumption of embedded real-time systems. The energy efficiency of a DVS algorithm largely depends on the performance of the slack estimation method used in it. In this paper, we propose novel DVS algorithms for periodic hard real-time tasks based on an improved slack estimation algorithm. Unlike the existing techniques, the proposed method can be applied to most priority-driven scheduling policies. Especially, we apply the proposed slack estimation method to EDF and RM scheduling policies. The experimental results show that the DVS algorithms using the proposed slack estimation method reduce the energy consumption by 20∼40 % over the existing DVS algorithms.