Browse > Article
http://dx.doi.org/10.14372/IEMEK.2016.11.2.97

Low-Power IoT Microcontroller Code Memory Interface using Binary Code Inversion Technique Based on Hot-Spot Access Region Detection  

Park, Daejin (Kyungpook National University)
Publication Information
IEMEK Journal of Embedded Systems and Applications / v.11, no.2, 2016 , pp. 97-105 More about this Journal
Abstract
Microcontrollers (MCUs) for endpoint smart sensor devices of internet-of-thing (IoT) are being implemented as system-on-chip (SoC) with on-chip instruction flash memory, in which user firmware is embedded. MCUs directly fetch binary code-based instructions through bit-line sense amplifier (S/A) integrated with on-chip flash memory. The S/A compares bit cell current with reference current to identify which data are programmed. The S/A in reading '0' (erased) cell data consumes a large sink current, which is greater than off-current for '1' (programmed) cell data. The main motivation of our approach is to reduce the number of accesses of erased cells by binary code level transformation. This paper proposes a built-in write/read path architecture using binary code inversion method based on hot-spot region detection of instruction code access to reduce sensing current in S/A. From the profiling result of instruction access patterns, hot-spot region of an original compiled binary code is conditionally inverted with the proposed bit-inversion techniques. The de-inversion hardware only consumes small logic current instead of analog sink current in S/A and it is integrated with the conventional S/A to restore original binary instructions. The proposed techniques are applied to the fully-custom designed MCU with ARM Cortex-M0$^{TM}$ using 0.18um Magnachip Flash-embedded CMOS process and the benefits in terms of power consumption reduction are evaluated for Dhrystone$^{TM}$ benchmark. The profiling environment of instruction code executions is implemented by extending commercial ARM KEIL$^{TM}$ MDK (MCU Development Kit) with our custom-designed access analyzer.
Keywords
Bit-line sense amplifier; Instruction access pattern; Low-power instruction access; Flash read-path architecture;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
연도 인용수 순위
1 IEEE Internet Initiative, "Towards a Definition of the Internet of Things (IoT)," Available: http://iot.ieee.org/definition.html, May 2015.
2 L. Atzori, A. Iera, G. Morabito, "From "smart objects" to "social objects": The next evolutionary step of the internet of things," IEEE Communications Magazine, Vol. 52, No. 1, pp. 97-105, 2014.
3 S. Distefano, G. Merlino, A. Puliafito, "Application deployment for IoT: An infrastructure approach," Proceedings of IEEE Global Communications Conference, pp. 2798-2803, 2013.
4 K. Itoh, H. Kurata, K. Osada, T. Sekiguchi, "Memory at VLSI circuits symposium," IEEE Journal of Solid-State Circuits, Vol. 43, No. 4, pp. 762-768,l 2008.   DOI
5 P. Cappelletti, "Flash memories," Kluwer Academic Publihsers, 1999.
6 T. Tanzawa, Y. Takano, T. Taura, S. Atsumi, "Design of a sense circuit for low-voltage flash memories," IEEE Journal of Solid-State Circuits, Vol. 35, No. 10, pp. 1415-1421, 2000.   DOI
7 R. Micheloni, L. Crippa, M. Sangalli, G. Campardo, "The flash memory read path: building blocks and critical aspects," Proceedings of the IEEE, Vol. 91, No. 4, pp. 537-553, 2003.   DOI
8 A. Conte, G. Lo Giudice, G. Palumbo, A. Signorello, "A 1.35v sense amplifier for non volatile memories based on current mode approach," Proceeding of IEEE the 30th European Solid-State Circuits Conference, pp. 471-474, 2004.
9 STMicroelectronics, "STM32 ARM Cortex M3 Microcontroller with ART AcceleratorTM," Available: http://www.st.com/
10 H. Joe, J. Park, C. Lim, D. Woo, H. Kim, "Instruction-Level Power Estimator for Sensor Networks," ETRI Journal, Vol. 30, No. 1, pp. 47-58, 2008,   DOI
11 D. Park, T.G. Kim, "A sense amplifier using binary code inversion encoder-decoder for on-chip flash read current reduction," Proceedings of International Conference on Electronics, Information and Communication, pp. 235-236, 2011.
12 D. Park, T.G. Kim, "Built-In Binary Code Inversion Technique for On-Chip Flash Memory Sense Amplifier With Reduced Read Currenta Consumption," IEEE Transactions on Very Large Scale Integration Systems, Vol. 22, No. 5, pp. 1187-1191, 2014.   DOI
13 ARM Corp. "MDK-ARM Development Kit," Available: http://www2.keil.com/mdk5/
14 ARM Corp. "Simulation DLLs for ${\mu}$Vision using Advanced Generic Simulator Interface (AGSI)," Application Note 196.
15 ARM Corp. "Dhrystone Benchmark for ARM Cortex Processors," Application Node 273.