• Title/Summary/Keyword: 아키텍처 탐색

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Development of High-Speed Real-Time Image Signal Processing Unit for Small Infrared Image Tracking Radar (소형 적외선영상 호밍시스템용 고속 실시간 영상신호처리기 개발)

  • Kim, Hong-Rak;Park, Jin-Ho;Kim, Kyoung-Il;Jeon, Hyo-won;Shin, Jung-Sub
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.21 no.4
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    • pp.43-49
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    • 2021
  • A small infrared image homing system is a tracking system that has an infrared image sensor that identifies a target through the day and night infrared image processing of the target on the ground and searches for and detects the target with respect to the main target. This paper describes the development of a board equipped with a high-speed CPU and FPGA (Field Programmable Gate Array) to identify target through real-time image processing by acquiring target information through infrared image. We propose a CPU-FPGA combining architecture for CPU and FPGA selection and video signal processing, and also describe a controller design using FPGA to control infrared sensor.

A Method of Instruction Length Determination Based on Execution Information in Undocumented Instruction Fuzzer (비 문서화 명령어 탐색 퍼저의 명령어 실행 정보 기반 길이 결정 방법)

  • Yoo-seok Lee; Won-jun Song
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.33 no.5
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    • pp.775-785
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    • 2023
  • As processor technology advances, it has accelerated ISA extensions and increased the complexity of micro-architectures, leading to a continued rise in the importance of processor validation techniques. Recently, various fuzzing techniques have been introduced to discover undocumented instructions, and this study highlights the shortcomings of existing undocumented instruction fuzzing techniques and presents our observation on error cases in the latest processors from Intel and AMD. In particular, we analyzes the causes of false positives resulting from the fuzzer incorrectly judging CPU instruction length and proposes the length determination technique based on instruction execution information to improve accuracy.

The Exploratory Study on IT Investment Management of the Public Sector Based on Forecasting (수요예측기반의 공공정보화 투자관리방안에 대한 탐색적 연구)

  • Lee, Jae-Du;Park, Sae-Gue
    • Journal of Information Technology and Architecture
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    • v.11 no.1
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    • pp.1-10
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    • 2014
  • From 2004 to 2013, the annual investment for the ICT sector in Korea amounted to about 3.2 trillion won. Depending on whether the government policy allowed for budget increases and/or decreases, this impacted the investment in the ICT sector. In particular, the fixed costs of operation and maintenance lead to a reduced chance for a new potential demands in IT programs. Even though a situation may exist that there are insufficient funds available, there is a need for building a sustainable long-term IT investment management system. The purpose of this study is to conduct basic research for the arrangement of preparation to meet IT needs required in the public sector. For this, this paper introduces the concept of IT Investment Management based on prudent forecasting. After both foreign and domestic relevant cases are reviewed, implications will be derived from the aforementioned cases. Through this process, the direction of IT Investment Management based on forecasting for the IT projects decision making will be suggested. These research results could be used for helping to develop better policies and a more efficient management of the public sector IT budget.

Design Space Exploration of Many-Core Processor for High-Speed Cluster Estimation (고속의 클러스터 추정을 위한 매니코어 프로세서의 디자인 공간 탐색)

  • Seo, Jun-Sang;Kim, Cheol-Hong;Kim, Jong-Myon
    • Journal of the Korea Society of Computer and Information
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    • v.19 no.10
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    • pp.1-12
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    • 2014
  • This paper implements and improves the performance of high computational subtractive clustering algorithm using a single instruction, multiple data (SIMD) based many-core processor. In addition, this paper implements five different processing element (PE) architectures (PEs=16, 64, 256, 1,024, 4,096) to select an optimal PE architecture for the subtractive clustering algorithm by estimating execution time and energy efficiency. Experimental results using two different medical images and three different resolutions ($128{\times}128$, $256{\times}256$, $512{\times}512$) show that PEs=4,096 achieves the highest performance and energy efficiency for all the cases.

Development of Simulator for Designing Unidirectional AGV Systems (일방향 AGV 시스템 설계를 위한 시뮬레이터 개발)

  • Lee, Gyeong-Jae;Seo, Yoon-Ho
    • Journal of the Korea Society for Simulation
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    • v.17 no.4
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    • pp.133-142
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    • 2008
  • AGV systems are widely used to increase the flexibility and the efficiency of the material handling systems. AGV systems are one of critical factors which determine the overall performance of the manufacturing systems. To this end, the optimal design for AGV systems is essential. Commercial simulation software is often used as an analysis tool during the design of AGV systems, however a series of procedures are desirable to simplify the analysis processes. In this paper, we present and develop the architecture for unidirectional AGV systems simulator which is able to consider approximate optimal unidirectional flow path and various operational parameters. The designed AGV systems simulator is based on JAVA, and it is developed to support designing approximate optimal unidirectional network by using Tabu search method. In addition, it enables users to design and evaluate AGV systems and to analyze alternative solutions easily. Simulation engine is consists of layout designer, AGV operation plan designer, and integrated AGVS layout designer. Users enter their system design/operation information into input window, then the entered information is automatically utilized for modeling and simulating AGV systems in simulation engine. By this series of procedures, users can get the feed back quickly.

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Development of High-Speed Real-Time Signal Processing Unit for Small Radio Frequency Tracking Radar Using TMS320C6678 (TMS320C6678을 적용한 소형 Radio Frequency 추적레이다용 고속 실시간 신호처리기 설계)

  • Kim, Hong-Rak;Hyun, Hyo-Young;Kim, Younjin;Woo, Seonkeol;Kim, Gwanghee
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.21 no.5
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    • pp.11-18
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    • 2021
  • The small radio frequency tracking radar is a tracking system with a radio frequency sensor that identifies a target through all-weather radio frequency signal processing for a target and searches, detects and tracks the target for the major target. In this paper, we describe the development of a board equipped with TMS320C6678 and XILINX FPGA (Field Programmable Gate Array), a high-speed multi-core DSP that acquires target information through all-weather radio frequency and identifies a target through real-time signal processing. We propose DSP-FPGA combination architecture for DSP and FPGA selection and signal processing, and also explain the design of SRIO for high-speed data transmission.

Realtime Media Streaming Technique Based on Adaptive Weight in Hybrid CDN/P2P Architecture

  • Lee, Jun Pyo
    • Journal of the Korea Society of Computer and Information
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    • v.26 no.3
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    • pp.1-7
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    • 2021
  • In this paper, optimized media data retrieval and transmission based on the Hybrid CDN/P2P architecture and selective storage through user's prediction of requestability enable seamless data transfer to users and reduction of unnecessary traffic. We also propose a new media management method to minimize the possibility of transmission delay and packet loss so that media can be utilized in real time. To this end, we construct each media into logical segments, continuously compute weights for each segment, and determine whether to store segment data based on the calculated weights. We also designate scattered computing nodes on the network as local groups by distance and ensure that storage space is efficiently shared and utilized within those groups. Experiments conducted to verify the efficiency of the proposed technique have shown that the proposed method yields a relatively good performance evaluation compared to the existing methods, which can enable both initial latency reduction and seamless transmission.

QoS-Aware Optimal SNN Model Parameter Generation Method in Neuromorphic Environment (뉴로모픽 환경에서 QoS를 고려한 최적의 SNN 모델 파라미터 생성 기법)

  • Seoyeon Kim;Bongjae Kim;Jinman Jung
    • Smart Media Journal
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    • v.12 no.4
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    • pp.19-26
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    • 2023
  • IoT edge services utilizing neuromorphic hardware architectures are suitable for autonomous IoT applications as they perform intelligent processing on the device itself. However, spiking neural networks applied to neuromorphic hardware are difficult for IoT developers to comprehend due to their complex structures and various hyper-parameters. In this paper, we propose a method for generating spiking neural network (SNN) models that satisfy user performance requirements while considering the constraints of neuromorphic hardware. Our proposed method utilizes previously trained models from pre-processed data to find optimal SNN model parameters from profiling data. Comparing our method to a naive search method, both methods satisfy user requirements, but our proposed method shows better performance in terms of runtime. Additionally, even if the constraints of new hardware are not clearly known, the proposed method can provide high scalability by utilizing the profiled data of the hardware.

Design and Implementation of Bigdata Platform for Vessel Traffic Service (해상교통 관제 빅데이터 체계의 설계 및 구현)

  • Hye-Jin Kim;Jaeyong Oh
    • Journal of the Korean Society of Marine Environment & Safety
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    • v.29 no.7
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    • pp.887-892
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    • 2023
  • Vessel traffic service(VTS) centers are equipped with RADAR, AIS(Automatic Identification System), weather sensors, and VHF(Very High Frequency). VTS operators use this equipment to observe the movement of ships operating in the VTS area and provide information. The VTS data generated by these various devices is highly valuable for analyzing maritime traffic situation. However, owing to a lack of compatibility between system manufacturers or policy issues, they are often not systematically managed. Therefore, we developed the VTS Bigdata Platform that could efficiently collect, store, and manage control data collected by the VTS, and this paper describes its design and implementation. A microservice architecture was applied to secure operational stability that was one of the important issues in the development of the platform. In addition, the performance of the platform could be improved by dualizing the storage for real-time navigation information. The implemented system was tested using real maritime data to check its performance, identify additional improvements, and consider its feasibility in a real VTS environment.

MPSoC Design Space Exploration Based on Static Analysis of Process Network Model (프로세스 네트워크 모델의 정적 분석에 기반을 둔 다중 프로세서 시스템 온 칩 설계 공간 탐색)

  • Ahn, Yong-Jin;Choi, Ki-Young
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.10
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    • pp.7-16
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    • 2007
  • In this paper, we introduce a new design environment for efficient multiprocessor system-on-chip design space exploration. The design environment takes a process network model as input system specification. The process network model has been widely used for modeling signal processing applications because of its excellent modeling power. However, it has limitation in predictability, which could cause severe problem for real time systems. This paper proposes a new approach that enables static analysis of a process network model by converting it to a hierarchical synchronous dataflow model. For efficient design space exploration in the early design step, mapping application to target architectures has been a crucial part for finding better solution. In this paper, we propose an efficient mapping algorithm. Our mapping algorithm supports both single bus architecture and multiple bus architecture. In the experiments, we show that the automatic conversion approach of the process network model for static analysis is performed successfully for several signal processing applications, and show the effectiveness of our mapping algorithm by comparing it with previous approaches.