• Journal of the Korean Society for Nondestructive Testing
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• v.21 no.1
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• pp.54-61
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• 2001

A software package to classify acoustic emission (AE) signals using the wavelet transform and the neural network was developed Both of the continuous and the discrete wavelet transforms are considered, and the error back-propagation neural network is adopted as m artificial neural network algorithm. The signals acquired during the 3-point bending test of specimens which have artificial defects on weld zone are used for the classification of the defects. Features are extracted from the time-frequency plane which is the result of the wavelet transform of signals, and the neural network classifier is tamed using the extracted features to classify the signals. It has been shown that the developed software package is useful to classify AE signals. The difference between the classification results by the continuous and the discrete wavelet transforms is also discussed.

• Korean Journal of Optics and Photonics
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• v.19 no.1
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• pp.60-67
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• 2008

An all-optical 4-bit Gray code to binary coded decimal (BCD) converter by means of commercially available numerical analysis tool (VPI) was demonstrated, for the first time to our knowledge. Circuit design approach was modified appropriately in order to fit the electrical method on an all-optical logic circuit based on a cross gain modulation (XGM) process so that signal degradation due to the non-ideal optical logic gates can be minimized. Without regenerations, Q-factor of around 4 was obtained for the most severely degraded output bit (least significant bit-LSB) with 2.5 Gbps clean input signals having 20 dB extinction ratio. While modifying the two-level simplification method and Karnaugh map method to design a Gray code to BCD converter, a general design concept was also founded (one-level simplification) in this research, not only for the Gray code to BCD converter but also for any general applications.

• Journal of Satellite, Information and Communications
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• v.12 no.2
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• pp.89-93
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• 2017

This paper introduces an energy harvesting system that generates energy by collecting multi-band RF signals using buck-boost DC-DC converter. In an environment where the resistance of load using the collected electric energy is constantly changing, a buck-boost DC-DC converter is used in which the input resistance of the DC-DC converter does not change even if the load resistance changes. Since the frequency band of the input RF signal varies, the rectifier is designed for each band so that multiple bands can be processed, and a matching circuit is added to each band in front of the rectifier. For a rectifier to collect very small RF signals, a circuit is designed so that a constant voltage is obtained according to a very small input signal by devising a method of continuously accumulating the voltages collected and generated in each band. It is confirmed that the output efficiency can reach up to 20% even for the RF signal having the input of -20 dBm.

• Journal of the Korean Society for Nondestructive Testing
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• v.35 no.2
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• pp.112-119
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• 2015

Photoacoustic microscopy is capable of providing high-resolution molecular images, and its spatial resolution is typically determined by ultrasonic transducers used to receive the photoacoustic signals. Therefore, ultrasonic transducers for photoacoustic microscopy (PAM) should have a high operating frequency, broad bandwidth, and high signal-reception efficiency. Polyvinylidene fluoride (PVDF) is a suitable material. To take full advantage of this material, the selection of the backing material is crucial, as it influences the center frequency and bandwidth of the transducer. Therefore, we experimentally determined the most suitable backing material among EPO-TEK 301, E-Solder 3022, and RTV. For this, three PVDF high-frequency single-element transducers were fabricated with each backing material. The center frequency and -6 dB bandwidth of each transducer were ascertained by a pulse-echo test. The spatial resolution of each transducer was examined using wire-target images. The experimental results indicated that EPO-TEK 301 is the most suitable backing material for a PAM transducer. This material provides the highest signal magnitude and a reasonable bandwidth because a large portion of the energy propagates toward the front medium, and the PVDF resonates in the half-wave mode.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.6
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• pp.1103-1108
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• 2023

In this paper, we propose a new algorithm for attenuating the background noises in acoustic signal. This algorithm improves the noise attenuation performance by using the FNN(: Full-connected Neural Network) deep learning algorithm instead of the existing adaptive filter after wavelet transform. After wavelet transforming the input signal for each short-time period, noise is removed from a single input audio signal containing noise by using a 1024-1024-512-neuron FNN deep learning model. This transforms the time-domain voice signal into the time-frequency domain so that the noise characteristics are well expressed, and effectively predicts voice in a noisy environment through supervised learning using the conversion parameter of the pure voice signal for the conversion parameter. In order to verify the performance of the noise reduction system proposed in this study, a simulation program using Tensorflow and Keras libraries was written and a simulation was performed. As a result of the experiment, the proposed deep learning algorithm improved Mean Square Error (MSE) by 30% compared to the case of using the existing adaptive filter and by 20% compared to the case of using the STFT(: Short-Time Fourier Transform) transform effect was obtained.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.6
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• pp.39-47
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• 1998

A fourth-order $\Sigma$-$\Delta$ modulator is designed and implemented in 0.6 $\mu\textrm{m}$ CMOS technology. The modulator is verified by introducing nonlinear factors such as DC gain and slew rate in system model that determines the transfer function in S-domain and in time-domain. Dynamic range is more than 110 dB and the peak SM is 102.6 dB at a clock rate of 2.8224 MHz for voiceband signal. The structure of a ∑-$\Delta$ modulator is a modified fourth-order ∑-$\Delta$ modulator using direct feedback loop method, which improves performance and consumes less power. The transmission zero for noise is located in the first-second integrator loop, which reduces entire size of capacitors, reduces the active area of the chip, improves the performance, and reduces power dissipation. The system is stable because the output variation with respect to unit time is small compared with that of the third integrator. It is easy to implement because the size of the capacitor in the first integrator, and the size of the third integrator is small because we use the noise reduction technique. This paper represents a new design method by modeling that conceptually decides transfer function in S-domain and in Z-domain, determines the cutoff frequency of signal, maximizes signal power in each integrator, and decides optimal transmission-zero frequency for noise. The active area of the prototype chip is 5.25$\textrm{mm}^2$, and it dissipates 10 mW of power from a 5V supply.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.7
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• pp.1442-1447
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• 2004

In this paper, a 6-Bit CMOS Folding and Interpolating AD Converter is presented. The converter is considered to be useful as an integrated part of a VLSI circuit handling both analog and digital signals as in the case of HDD or LAN applications. A built-in analog circuit for VLSI of a high-speed data communication requires a small chip area, low power consumption, and fast data processing. The proposed folding and interpolating AD Converter uses a very small number of comparators and interpolation resistors, which is achieved by cascading a couple of folders working in different principles. This reduced number of parts is a big advantage for a built-in AD converter design. The design is based on 0.25m double-poly 2 metal n-well CMOS process. In the simulation, with the applied 2.5V and a sampling frequency of 500MHz, the measurements are as follows: power consumption of 27mw, INL and DNL of $\pm$0.1LSB, $\pm$0.15LSB each, SNDR of 42dB with an input signal of 10MHz.

• Journal of Broadcast Engineering
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• v.21 no.5
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• pp.803-815
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• 2016

In this paper, we design a direct radio frequency (RF) sampling receiver for multiband GNSS signals and demonstrate its performance. The direct RF sampling is a technique that does not use an analog mixer, but samples the passband signal directly, and all receiver processes are done in digital domain, whereas the conventional intermediate frequency (IF) receiver samples the IF band signals. In contrast to the IF sampling receiver, the RF sampling receiver is less complex in hardware, reconfigurable, and simultaneously converts multiband signals to digital signals with an analog-to-digital (AD) converter. The reconfigurability and simultaneous reception are very important in military applications where rapid change to other system is needed when a system is jammed by an enemy. For simultaneous reception of multiband signals, the sampling frequency should be selected with caution by considering the carrier frequencies, bandwidths, desired intermediate frequencies, and guard bands. In this paper, we select a sampling frequency and design a direct RF sampling receiver to receive multiband global navigation satellite system (GNSS) signals such as GPS L1, GLONASS G1 and G2 signals. The receiver is implemented with a commercial AD converter and software. The receiver performance is demonstrated by receiving the real signals.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.1
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• pp.93-97
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• 2007

In this paper a new clock generation scheme for TDM-CDM converter in the Gap Filler for satellite DMB systems has been proposed. The scheme uses the frame sync signal from the Ku band TDM receiver to lock the VCXO which provides the system clock for the TDM-CDM converter. The locking algorithm can be easily implemented in the FPGA, so that no separate circuitry is needed as in conventional PLL. With a stable OCXO, The scheme can be used to generate the reference clock to the local oscillator for RF parts.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2014.11a
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• pp.18-20
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• 2014

본 논문에서는 스크린 컨텐츠 동영상의 효율적인 압축을 위한 부호화 기법을 제안한다. 제안 부호화 기법은 RGB 색 요소 간의 신호의 통계적 중복성을 줄이기 위한 적응적 색 변환 기법에 기반한다. 기존의 색 변환 기법들은 스크린 컨텐츠 동영상이 포함하는 신호의 급격히 변화하는 ?계적 특성에 적용하기 어려운 반면 제안 방식에서는 부호화 블록의 시간적/공간적 주위 픽셀의 정보를 이용한 성분 분석을 통해 색 공간 변환 행렬식을 유도하여 부호화에 사용한다. 주위 픽셀 정보는 부호화 블록의 예측 방식에 따라 결정하며 움직임 벡터를 이용한 시간/변위 예측 부호 방식에서는 참조 블록의 정보를 이용하고 공간적 예측 방식에서는 블록의 인접 픽셀를 이용한다. 부호기 측에서는 비트율-왜곡 최적화를 통하여 예측 후 잔여신호의 부호화를 원래의 RGB 공간에서 수행할지 또는 색 변환한 공간에서 수행할지를 결정하고 관련 정보를 표시하여 블록 단위로 전송함으로써 부호화 효율을 증대한다. 실험에 의하면 제안 기법은 기존 압축 방식 대비 탁월한 부호화 성능을 제공함을 보인다.