• Title/Summary/Keyword: 시간 논리

Search Result 661, Processing Time 0.02 seconds

Methods to Reduce Execution Time of Ontology Reasoners based on Tableaux Algorithm (태블로 알고리즘 기반 온톨로지 추론 엔진의 속도 향상을 위한 방법)

  • Kim, Je-Min;Park, Young-Tack
    • Journal of KIISE:Software and Applications
    • /
    • v.36 no.2
    • /
    • pp.153-160
    • /
    • 2009
  • As size of ontology has been increased more and more, the descriptions in the ontologies become more complicated, Therefore finding and modifying unsatisfiable concepts is hard work in ontology construction process, Minerva is an ontology reasoner which detects unsatisfiable concepts automatically and infers subsumption relation between concepts in ontology, Most description logic based ontology reasoners (including Minerva) work using tableaux algorithm, Because tableaux algorithm is very costly, ontology reasoners need various optimization methods, In this paper, we propose optimizing methods to reduce execution time of tableaux algorithm based ontology reasoner. Proposed methods were applied to Minerva which was developed as preceding study result. In consequence the new version Minerva shows high performance.

Design of a Low-Power Multiplier Using MOS Current Mode Logic Circuit (MOS 전류모드 논리회로를 이용한 저 전력 곱셈기 설계)

  • Lee, Yoon-Sang;Kim, Jeong-Beom
    • Journal of IKEEE
    • /
    • v.11 no.2
    • /
    • pp.83-88
    • /
    • 2007
  • This paper proposes an 8${\times}$8 bit parallel multiplier using MOS current-mode logic (MCML) circuit for low power consumption. The 8${\times}$8 multiplier is designed with proposed MCML full adders and conventional full adders. The designed multiplier is achieved to reduce the power consumption by 9.4% and the power-delay-product by 11.7% compared with the conventional circuit. This circuit is designed with Samsung 0.35${\mu}m$ standard CMOS process. The validity and effectiveness are verified through the HSPICE simulation.

  • PDF

On the Acceleration of Redundancy Identification for VLSI Logic Optimization (VLSI 논리설계 최적화를 위한 Redundancy 조사 가속화에 관한 연구)

  • Lee, Seong-Bong;Chong, Jong-Wha
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.27 no.3
    • /
    • pp.131-136
    • /
    • 1990
  • In this paper, new methods are proposed which speed up the logical redundancy identification for the gate-level logic optimization. Redundancy indentification, as well as deterministic test pattern generation, can be viewed as a finite space search problem, of which execution time depends on the size of the search space. For the purpose of efficient search, we propose dynamic head line and mandatory assignment. Dynamic head lines are changed dynamically in the process of the redundancy identification. Mandatory assignement can avoid unnecessary assignment. They can reduce the search size efficiently. Especially they can be used even though the circuit is modified in the optimization procedure, that is different from the test pattern generation methods. Some experimental results are presented indicating that the proposed methods are faster than existing methods.

  • PDF

On a Logical Path Design for Optimizing Power-delay under a Fixed-delay Constraint (고정 지연 조건에서 전력-지연 효율성의 최적화를 위한 논리 경로 설계)

  • Lee, Seung-Ho;Chang, Jong-Kwon
    • The KIPS Transactions:PartA
    • /
    • v.17A no.1
    • /
    • pp.27-32
    • /
    • 2010
  • Logical Effort is a simple hand-calculated method that measures quick delay estimation. It has the advantage of reducing the design cycle time. However, it has shortcomings in designing a path for minimum area or power under a fixed-delay constraint. In this paper, we propose an equal delay model and, based on this, a method of optimizing power-delay efficiency in a logical path. We simulate three designs of an eight-input AND gate using our technique. Our results show about 40% greater efficiency in power dissipation than those of Logical Effort method.

Logical operation tracking using optical flow and improvement of gradient operation speed (옵티컬 플로우를 이용한 논리연산 트래킹과 그레디언트 연산속도 개선)

  • 안태홍;정상화;박종안
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.23 no.4
    • /
    • pp.787-795
    • /
    • 1998
  • In this paper, we have improved the speed of gradient operation, which needs to calculate Optical Flow for estimating a moving object, and proposed a method which estimate the contour of a moving object by the logical operationg of Optical Flow and edge in noisy images. The proposed method, which recognize to a moving ogject and traking a moving object, using logical operation of Optical Flow and edge in low-level has a advantage that is simpler than the known method for moving objects estimation. In addition, we have simulated several images using method I and method II on improved Gradient operation speed. When we have compared the average value of total operation time, method I is improved with 12% of operation speed compared with the known method, method II is improved with 38% operation speed.

  • PDF

Design of a Low-Power Parallel Multiplier Using Low-Swing Technique (저 전압 스윙 기술을 이용한 저 전력 병렬 곱셈기 설계)

  • Kim, Jeong-Beom
    • The KIPS Transactions:PartA
    • /
    • v.14A no.3 s.107
    • /
    • pp.147-150
    • /
    • 2007
  • This paper describes a new low-swing inverter for low power consumption. To reduce a power consumption, an output voltage swing is in the range from 0 to VDD-2VTH. This can be done by the inverter structure that allow a full swing or a swing on its input terminal without leakage current. Using this low-swing voltage technology, we proposed a low-power 16$\times$16 bit parallel multiplier. The proposed circuits are designed with Samsung 0.35$\mu$m standard CMOS process at a 3.3V supply voltage. The validity and effectiveness are verified through the HSPICE simulation.. Compared to the previous works, this circuit can reduce the power consumption rate of 17.3% and the power-delay product of 16.5%.

Development of A Traffic Network Controller using Fuzzy Logic (퍼지 논리를 사용한 교통망 제어기의 개발)

  • Kim, Jong-Wan;Han, Byung-Joon
    • The Transactions of the Korea Information Processing Society
    • /
    • v.5 no.11
    • /
    • pp.2908-2914
    • /
    • 1998
  • This paper presents an intelligent signal for controling the traffic lights on traffic junction network with dynamic traffic flow, When a junction is connected to adjacent junctions on four sides. Prior researches have been done on the single traffic junction. However, it is dificult to apply single junction controller to real traffic situation. In this paper, we develop a fuzzy taffic network controller which adjusts the extension time of current green phase by using teh fuzzy input variables such as the number of entering cars at the green light, the number of waiting cars during the red light, and the traffic volume. The proposed method was compared to the existing junction signal control methods on controllers in terms of average delay time of cars and the cost function defined in this paper.

  • PDF

A debate between Eternalism and Temporalism focused on Anaphoric 'that' argument (대용어적 '그것' 논증을 둘러싼 영원주의와 일시주의 사이의 논쟁에 대하여)

  • Choi, Dongho
    • Korean Journal of Logic
    • /
    • v.19 no.3
    • /
    • pp.401-435
    • /
    • 2016
  • Can a proposition that a sentence like "It is raining" represents be sometimes itself? or is it always ? This is known as the debate between Eternalism and Temporalism and belongs to the sub-category of the wider debate between Classical Propositionalism and Non-classical Propositionalism. Regarding this matter, Cappelen and Hawthorne(2009), supporting Eternalism[Classical Propositionalism], raise interesting objection to anaphoric 'that' argument that is one of the famous arguments supporting Temporalism. In this paper, I try to show how difficult it is to advocate Classical Propositionalism by refuting what Cappelen and Hawthorne claim.

  • PDF

The Constructive Interpretation of Probability (구성주의 확률해석)

  • Yang, Kyoung-Eun
    • Korean Journal of Logic
    • /
    • v.17 no.3
    • /
    • pp.461-484
    • /
    • 2014
  • This essay suggests a constructive interpretation of probabilities by diagnosing problems of the objective and the epistemic interpretations of probability. According to this interpretation, attributions of the mathematical structure of probability to a given system can be understood as positing constructive theoretical hypotheses showing the relationship among empirical data. The constructive interpretation is applied to comprehend probability claims in the explanation of temporal asymmetrical behaviour of our universe. A new approach interpreting probabilities as constructive theoretical terms enables us to circumvent shortcomings of both objective and subjective interpretation of probability, and appreciate why these interpretations nevertheless appear to be convincing in our case.

  • PDF

A Study on Reasoning for Medical Expert Systems (의료용 전문가 시스템에서 추론에 관한 연구)

  • Kim, Jin-Sang;Shin, Yang-Kyu
    • Journal of the Korean Data and Information Science Society
    • /
    • v.10 no.2
    • /
    • pp.359-367
    • /
    • 1999
  • We investigate a logical approach to represent medical knowledge, reason deductively and diagnostically. It is suggested that medical knowledge-bases can be formulated as a set of sentences stated in classical logic where each sentence reflects a doctor's knowledge about the human anatomy or his/her view of patient's symptoms. It is also suggested that a form of temporal reasoning can be captured within the same framework because each sentence can have a different truth value based on time. We apply our logical framework to formalize diagnostic reasoning, where the primary cause of illness is chosen among the set of minimal causation on the basis of abductive hypotheses. Most of our examples are given in the context of medical expert systems.

  • PDF