• Title/Summary/Keyword: 수신전압

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Chip Implementation of 830-Mb/s/pin Transceiver for LPDDR2 Memory Controller (LPDDR2 메모리 컨트롤러를 위한 830-Mb/s/pin 송수신기 칩 구현)

  • Jong-Hyeok, Lee;Chang-Min, Song;Young-Chan, Jang
    • Journal of IKEEE
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    • v.26 no.4
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    • pp.659-670
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    • 2022
  • An 830-Mb/s/pin transceiver for a controller supporting ×32 LPDDR2 memory is designed. The transmitter consists of eight unit circuits has an impedance in the range of 34Ω ∽ 240Ω, and its impedance is controlled by an impedance correction circuit. The transmitted DQS signal has a phase shifted by 90° compared to the DQ signals. In the receive operation, the read time calibration is performed by per-pin skew calibration and clock-domain crossing within a byte. The implemented transceiver for the LPDDR2 memory controller is designed by using a 55-nm process using a 1.2V supply voltage and has a maximum signal transmission rate of 830 Mb/s/pin. The area and power consumption of each lane are 0.664 mm2 and 22.3 mW, respectively.

A UTMI-Compatible USB2.0 Transceiver Chip Design (UTMI 표준에 부합하는 USB2.0 송수신기 칩 설계)

  • Nam Jang-Jin;Kim Bong-Jin;Park Hong-June
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.5 s.335
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    • pp.31-38
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    • 2005
  • The architecture and the implementation details of a UTMI(USB2.0 Transceiver Macrocell Interface) compatible USB2.0 transceiver chip were presented. To confirm the validation of the incoming data in noisy channel environment, a squelch state detector and a current mode Schmitt-trigger circuit were proposed. A current mode output driver to transmit 480Mbps data on the USB cable was designed and an on-die termination(ODT) which is controlled by a replica bias circuit was presented. In the USB system using plesiochronous clocking, to compensate for the frequency difference between a transmitter and a receiver, a synchronizer using clock data recovery circuit and FIFO was designed. The USB cable was modeled as the lossy transmission line model(W model) for circuit simulation by using a network analyzer measurements. The USB2.0 PHY chip was implemented by using 0.25um CMOS process and test results were presented. The core area excluding the IO pads was $0.91{\times}1.82mm^2$. The power consumptions at the supply voltage of 2.5V were 245mW and 150mW for high-speed and full-speed operations, respectively.

A 2.4 GHz Bio-Radar System with Small Size and Improved Noise Performance Using Single Circular-Polarized Antenna and PLL (하나의 원형 편파 안테나와 PLL을 이용하여 소형이면서도 개선된 잡음 성능을 갖는 2.4 GHz 바이오 레이더 시스템)

  • Jang, Byung-Jun;Park, Jae-Hyung;Yook, Jong-Gwan;Moon, Jun-Ho;Lee, Kyoung-Joung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.12
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    • pp.1325-1332
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    • 2009
  • In this paper, we design a 2.4 GHz bio-radar system that can detect human heartbeat and respiration signals with small size and improved noise performance using single circular-polarized antenna and phase-locked loop. The demonstrated bio-radar system consists of single circular-polarized antenna with $90^{\circ}$ hybrid, low-noise amplifier, power amplifier, voltage-controlled oscillator with phase-locked loop circuits, quadrature demodulator and analog circuits. To realize compact size, the printed annular ring stacked microstrip antenna is integrated on the transceiver circuits, so its dimension is just $40\times40mm^2$. Also, to improve signal-to-noise-ratio performance by phase noise due to transmitter leakage signal, the phase-locked loop circuit is used. The measured results show that the heart rate and respiration accuracy was found to be very high for the distance of 50 cm without the additional digital signal processing.

Design of Asynchronous System Bus Wrappers based on a Hybrid Ternary Data Encoding Scheme (하이브리드 터너리 데이터 인코딩 기반의 비동기식 시스템 버스 래퍼 설계)

  • Lim, Young-Il;Lee, Je-Hoon;Lee, Seung-Sook;Cho, Kyoung-Rok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.1
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    • pp.36-44
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    • 2007
  • This paper presented a hybrid ternary encoding scheme using 3-valued logic. It can adapt to the delay-insensitive(DI) model. We designed an asynchronous wrapper for the hybrid ternary encoding scheme to communicate with various asynchronous encoding schemes. It reduced about 50% of transmission lines and power consumption compared with the conventional 1-of-4 and ternary encoding scheme. The proposed wrappers were designed and simulated using the $0.18-{\mu}m$ standard CMOS technology. As a result, the asynchronous wrapper operated over 2 GHz communicating with a system bus. Moreover, the power dissipation of the system bus adapted the hybrid ternary encoding logic decreases 65%, 43%, and 36% of the dual-rail, 1-of-4, and ternary encoding scheme, respectively. The proposed data encoding scheme and the wrapper circuit can be useful for asynchronous high-speed and low-power asynchronous interface.

A Study of Fabrication of RF Control System for Building Sunshade (건물 차양을 위한 RF제어 시스템 제작에 관한 연구)

  • Park, Jung-Cheul;Chu, Soon-Nam
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.14 no.6
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    • pp.149-157
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    • 2014
  • This paper is based on the fabrication of wireless control system for the building shading device. RF Module was controlled by UHF wireless CC1020 chip which has low electrical power and low electrical voltage. Also 447.8625~447.9875 frequency, 4800Baud data rate and 12.5 kHz channel spacing was controlled by the use of SPDT switch and with Microcontroller program. Furthermore, the helical antenna was used. The starting production of 447.8625~447.9875 kHz wireless electrical power was used. As the result, it did not exceed 10dBm which is the standard of low power wireless system. Shading efficiency was measured at 25%, 50%, 75% direction with controlling the interior temperature and the intensity of illumination at the rate of 1 hour. As the result, the intensity of illumination was lowered to 82~87% at 25% direction with $0.6{\sim}1.4^{\circ}C$ lowered temperature. At 50% direction, the intensity of illumination was lowered to 60~68% with $2.3{\sim}4.1^{\circ}C$ lowered temperature. And at 75% direction, the intensity of illumination was lowered to 41~47% with $3.4{\sim}5.1^{\circ}C$ lowered temperature.

A Fully Integrated Low-IF Receiver using Poly Phase Filter for VHF Applications (다중위상필터(Poly Phase Filter)를 이용한 VHF용 Low-IF 수신기 설계)

  • Kim, Seong-Do;Park, Dong-Woon;Oh, Seung-Hyeub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.5A
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    • pp.482-489
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    • 2010
  • In this paper we have proposed a new architecture of DQ-IRM(Double-Quadrature Image Rejection Mixer) for image rejection in the low-IF receiver. It consist of a frequency-tunable RF PPF(Poly Phase Filter) and the quadrature mixers. The conventional DQ-IRM generates the quadrature RF signals for the RF wide band at once. But the proposed DQ-IRM with the frequency-tuable RF PPF generates the quadrature RF signals for the narrow band of 2~3 channels bandwidth, which is partitioned from the RF wide band. We designed the CMOS RF tuner for T-DMB(Terrestrial Digital Multimedia Broadcasting) with the proposed 3rd DQ-IRM using a 0.18um CMOS technology and verified the performances of the designed receiver such as the image rejection ratio, the noise figure and the power consumption. The overall NF of the RF tuner is about 1.26 dB and the image reject ratio is about 51 dB. The power consumption is 55.8 mW at 1.8 V supply voltage. The chip area is $3.0{\times}2.5mm^2$.

Thickness Evaluation of the Aluminum Using Pulsed Eddy Current (펄스 와전류를 이용한 알루미늄 두께 평가)

  • Lee, Jeong-Ki;Suh, Dong-Man;Lee, Seung-Seok
    • Journal of the Korean Society for Nondestructive Testing
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    • v.25 no.1
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    • pp.15-19
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    • 2005
  • Conventional eddy current testing has been used for the detection of the defect-like fatigue crack in the conductive materials, such as aluminum, which uses a sinusoidal signal with very narrow frequency bandwidth, Whereas, the pulsed eddy current method uses a pulse signal with a broad bandwidth. This can allow multi-frequency eddy current testing, and the penetration depth is greater than that of the conventional eddy current testing. In this work, a pulsed eddy current instrument was developed for evaluating the metal loss. The developed instrument was composed of the pulse generator generating the maximum square pulse voltage of 40V, an amplifier controlled up to 52dB, an A/D converter of 16 bit and the sampling frequency of 20 MHz, and an industrial personal computer operated by the Windows program. A pulsed eddy current probe was designed as a pancake type in which the sensing roil was located inside the driving roil. The output signals of the sensing roil increased rapidly wich the step pulse driving voltage かn off, and the latter part of the sensing coil output voltage decreased exponentially with time. The decrement value of the output signals increased as the thickness of the aluminum test piece increased.

Dual-Band Frequency Reconfigurable Small Eighth-Mode Substrate-Integrated Waveguide Antenna (이중 대역 주파수 가변 1/8차 소형 기판집적형 도파관 안테나)

  • Kang, Hyunseong;Lim, Sungjoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.25 no.1
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    • pp.10-18
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    • 2014
  • In this paper, we propose a new frequency reconfigurable dual-band antenna. By using an electronically compact eighth-mode substrate-integrated-waveguide(EMSIW) resonator, we have designed a compact antenna, which performs dual-band movement by additionally loading a complementary split ring resonator(CSRR) structure. The EMSIW and CSRR structures are designed to satisfy the bandwidths of 1.575 GHz(GPS) and 2.4 GHz(WLAN), respectively. We load the CSRR with a varactor diode to allow a narrow bandwidth and to enable the resonance frequency to continuously vary from 2.4 GHz to 2.5 GHz. Thus, we realize a channel selection function that is used in the WLAN standards. Irrespective of how a varactor diode moves, the EMSIW independently resonates so that the antenna maintains a fixed frequency of the GPS bandwidth even at different voltages. Consequently, as the DC bias voltage changes from 11.4 V to 30 V, the resonance frequency of the WLAN bandwidth continuously changes between 2.38 GHz and 2.5 GHz, when the DC bias voltage changes from 11.4 V to 30 V. We observe that the simulated and the measured S-parameter values and radiation patterns are in good agreement with each other.

A Wireless Video Streaming System for TV White Space Applications (TV 유휴대역 응용을 위한 무선 영상전송 시스템)

  • Park, Hyeongyeol;Ko, Inchang;Park, Hyungchul;Shin, Hyunchol
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.4
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    • pp.381-388
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    • 2015
  • In this paper, a wireless video streaming system is designed and implemented for TV white space applications. It consists of a RF transceiver module, a digital modem, a camera, and a LCD screen. A VGA resolution video is captured by a camera, modulated by modem, and transmitted by RF transceiver module, and finally displayed at a destination 2.6-inch LCD screen. The RF transceiver is based on direct-conversion architecture. Image leakage is improved by low pass filtering LO, which successfully covers the TVWS. Also, DC offset problem is solved by current steering techniques which control common mode level at DAC output node. The output power of the transmitter and the minimum sensitivity of the receiver is +10 dBm and -82 dBm, respectively. The channel bandwidth is tunable among 6, 7 and 8 MHz according to regulations and standards. Digital modem is realized in Kintex-7 FPGA. Data rate is 9 Mbps based on QPSK and 512ch OFDM. A VGA video is successfully streamed through the air by using the developed TV white-space RF communication module.

A Study on Smart Ground Resistance Measurement Technology Based on Aduino (아두이노 기반 IT융합 스마트 대지저항 측정 기술 연구)

  • Kim, Hong Yong
    • Journal of the Society of Disaster Information
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    • v.17 no.4
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    • pp.684-693
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    • 2021
  • Purpose: The purpose is to establish a safe facility environment from abnormal voltages such as lightning by developing a smart land resistance measuring device that can acquire real-time land resistance data using Arduino. Method: This paper studied design models and application cases by developing a land resistance acquisition and analysis system with Arduino and a power line communication (PLC) system. Some sites in the wind power generation complex in Gyeongsangnam-do were selected as test beds, and real-time land resistance data applied with new technologies were obtained. The electrode arrangement adopted a smart electrode arrangement using a combination of a Wenner four electrode arrangement and a Schlumberger electrode arrangement. Result: First, the characteristic of this technology is that the depth of smart multi-electrodes is organized differently to reduce the error range of the acquired data even in the stratigraphic structure with specificity between floors. Second, IT convergence technology was applied to enable real-time transmission and reception of information on land resistance data acquired from smart ground electrodes through the Internet of Things. Finally, it is possible to establish a regular management system and analyze big data accumulated in the server to check the trend of changes in various elements, and to model the optimal ground algorithm and ground system design for the IT convergence environment. Conclusion: This technology will reduce surge damage caused by lightning on urban infrastructure underlying the 4th industrial era and design an optimized ground system model to protect the safety and life of users. It is also expected to secure intellectual property rights of pure domestic technology to create jobs and revitalize our industry, which has been stagnant as a pandemic in the post-COVID-19 era.