전기전자학회논문지 (Journal of IKEEE)

  • 제26권4호
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  • Pages.659-670
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  • 2022
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  • 1226-7244(pISSN)
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  • 2288-243X(eISSN)
한국전기전자학회 (Institute of Korean Electrical and Electronics Engineers)
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LPDDR2 메모리 컨트롤러를 위한 830-Mb/s/pin 송수신기 칩 구현

Chip Implementation of 830-Mb/s/pin Transceiver for LPDDR2 Memory Controller

  • Jong-Hyeok, Lee (Dept. of Electronics Engineering, Graduate School, Kumoh National Institute of Technology) ;
  • Chang-Min, Song (Dept. of Electronics Engineering, Graduate School, Kumoh National Institute of Technology) ;
  • Young-Chan, Jang (Dept. of Electronics Engineering, Graduate School, Kumoh National Institute of Technology)
  • 투고 : 2022.11.30
  • 심사 : 2022.12.20
  • 발행 : 2022.12.31
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초록

본 논문에서는 ×32 LPDDR2 메모리를 지원하는 컨트롤러를 위한 830-Mb/s/pin 송수신기가 설계된다. 여덟 개의 단위 회로로 구성된 송신단은 34Ω ∽ 240Ω 범위의 임피던스를 가지고 임피던스 보정 회로에 의해 제어된다. 송신되는 DQS의 신호는 DQ의 신호들 대비 90° 이동된 위상을 가진다. 수신 동작시 read time 보정은 바이트 내에서 per-pin 스큐 보정과 클록-도메인 전환을 통해 수행된다. 구현된 LPDDR2 메모리 컨트롤러를 위한 송수신기는 1.2V 공급 전압을 사용하는 55-nm 공정에서 설계되었으며 830-Mb/s/pin의 신호 전송률을 가진다. 각 lane의 면적과 전력 소모는 각각 0.664 mm2과 22.3 mW이다.

An 830-Mb/s/pin transceiver for a controller supporting ×32 LPDDR2 memory is designed. The transmitter consists of eight unit circuits has an impedance in the range of 34Ω ∽ 240Ω, and its impedance is controlled by an impedance correction circuit. The transmitted DQS signal has a phase shifted by 90° compared to the DQ signals. In the receive operation, the read time calibration is performed by per-pin skew calibration and clock-domain crossing within a byte. The implemented transceiver for the LPDDR2 memory controller is designed by using a 55-nm process using a 1.2V supply voltage and has a maximum signal transmission rate of 830 Mb/s/pin. The area and power consumption of each lane are 0.664 mm2 and 22.3 mW, respectively.

키워드

과제정보

This research was supported by the HRD Program for the Industrial Innovation Program (P0017011) through the KIAT funded by the MOTIE and the Basic Science Research Program (2020R1I1A3071634) through the NRF funded by the Ministry of Education, Korea. Authors would like to thank the IC Design Education Center in Korea for supporting the EDA tools.

참고문헌

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