• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.4
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• pp.25-31
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• 2017

This paper presents a 270/540/750/1500-Mb/s serial-data transmitter realized in a $0.13-{\mu}m$ CMOS technology for the applications of video data transmission. A low-cost RG-58 copper cable(5C-HFBT-RG6T) is exploited as a transmission medium connected to a single BNC connector, which shows cable loss 45 dB in maximum at 1.5 GHz. RLGC modeling provides an equivalent circuit for SPICE simulations of which characteristics are very similar to the measured cable loss. The loss can be compensated by pre-emphasis at transmitter and equalization at receiver if needed. Measurements of the proposed transmitter chip demonstrate the operations of 270-Mb/s, 540-Mb/s, 750-Mb/s and 1.5-Gb/s, and provide the output voltage levels of $370mV_{pp}$ at 1.5 Gb/s even with the pre-emphasis turned-off. The total power consumption is 104 mW from 1.2/3.3-V supplies and the chip occupies the area of $1.65{\times}0.9mm^2$.

• Proceedings of the Korean Society for Agricultural Machinery Conference
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• 2017.04a
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• pp.152-152
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• 2017

본 연구에서는 비례제어밸브를 이용한 자율주행 트랙터 조향 시스템 제어를 위하여 저가의 임베디드 시스템을 사용한 제어기를 개발하였다. 차륜의 조향각 측정을 위하여 전륜 킹핀에 포텐시오미터를 설치하였으며, 비례제어밸브는 -10 ~ +10V의 전압으로 밸브 스풀의 위치제어를 수행하도록 하였다. 조향각 측정과 비례제어밸브의 위치제어를 위하여 각각에 AT90CAN128 AVR보드를 사용하였으며, CAN통신으로 조향각 데이터가 비례제어밸브 제어용 데이터로 전송될 수 있도록 하였다. 비례제어밸브 제어 보드에는 DAC기능을 추가하였으며 0 ~ 5V의 출력을 -10 ~ +10V의 전압으로 변환해 주는 인터페이스회로를 추가하였다. 일반적으로 GPS 등의 데이터 수신율이 20 Hz인 점을 감안하여 비례제어 밸브는 50 ms의 주기로 P-제어를 수행할 수 있도록 하였다. 향후 트랙터의 방향각을 설정하는 또 하나의 시스템으로부터 목표 조향각을 부여받는 것을 가상하여 별도의 MCU를 통해 목표 조향각을 송신한 후, 조향 유압실린더에 의한 전륜의 조향각 시간 응답 특성을 조사하였다. 실험은 트랙터의 전륜을 지면으로부터 들어올린 무 부하 상태에서 진행하였으며, 목표 조향각은 $7.5^{\circ}$, $15.0^{\circ}$, $22.5^{\circ}$ 등 3단계로 변경하며 시간응답 특성을 측정하였다. 최대 오버슈트 11%, 최소 오버슈트 8.6%, 정상상태 오차 약 $0.825^{\circ}$, 시정수(Time Constant)는 3단계의 목표 조향각 설정에서 각각 0.706초, 0.488초, 0.38초로 나타났다.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.1 s.343
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• pp.143-148
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• 2006

This paper presents a high isolation and power-handling single-pole double-throw(SPDT) switch for dual band wireless LAN applications. The switch circuit has asymmetric topology which uses stacked-gate to have high power-handling and isolation for the Tx path. The proposed SPDT switch has been designed with optimum gate-width, bias, and number of stacked-gate FET. This SPDT switch has been implemented with $0.25{\mu}m$ GaAs pHEMT process which has Gmmax of 500mS/mm and fmax of 150GHz. The designed SPDT switch has the measured insertion loss of better than 0.9dB and isolation of better than 40dB for the Tx path and 25dB for the Rx path and the high power handling capability with PldB of about 23dBm for control voltage of -3/0V. The fabricated SPDT switch chip size is $1.8mm{\times}1.8mm$.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.4
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• pp.45-53
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• 1999

A pre amplifier, a limiting amplifier, and a decision IC chipset for 10Gbit/s optical receiver was implemented with AIGaAs/GaAs HBT(Heterojunction Bipolar Transistor) technology. The HBT allows a cutoff frequency of 55GHz and a maximum oscillation of 45GHz. An optical receiver front-end was implemented with the fabricated pre amplifier IC and a PIN photodiode. It showed 46dB$\Omega$, gain and $f_{3db}$ of 12.3GHz. The limiting amplifier Ie showed 27dB small signal gain, $f_{3db}$ of 1O.6GHz, and the output is limited to 900mVp-p from 20mVp-p input voltage. The decision circuit IC showed 300-degree phase margin and input voltage sensitivity of 47mVp-p at 1OGbit/s.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.6
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• pp.1269-1276
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• 2005

In this paper, Mixer using the direct-conversion method intended to use in front-end of a RF receiver is designed. The direct conversion Mixer is an alternative wireless receiver architecture to the well-established superheterodyne, particularly for high integration, low power, and low cost. It operates at 2.4GHz band, and is designed and simulated with a 0.35um CMOS technology and HSPICE simulator. Layout is implemented with a Mentor IC Station. The 2.4GHz CMOS Mixer employs a modified single-balanced Gilbert Cell with additional MOSFET in the output stages to improve IIP2, which is a standard of linearity in direct conversion receiver. Additional coversion-stages's transconductances are controlled by each MOSFET's physical properties. The HSPICE simulation results show that the 2.4GHz CMOS Mixer has voltage gam of 29dB, IIP2 of 63dBm, respectively. The Mixer also draws 3.5mA from a 3.3V supply.

• Journal of Sensor Science and Technology
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• v.3 no.3
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• pp.16-21
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• 1994

A 3-terminal pin-type photosensor with gate contrail is fabricated using standard silicon CMOS IC process. The photosensor of a $100{\mu}m{\times}120{\mu}m$ size has dark current less than 1nA and its breakdown voltage is -14V with a depletion capacitance 0.75 pF at -5V reverse bias. Responsivity at 0V gate voltage is 0.25A/W at $0.633{\mu}m$ wavelength, 0.19A/W at $0.805{\mu}m$. Responsivity increases with increasing gate voltage. The integrated circuit of photosensor and CMOS inverter shows $22K{\Omega}$ transimpedance and photocurrent of $90{\mu}A$ switchs the output state of digital inverter without additional amplifier.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.13 no.4
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• pp.38-46
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• 1999

Measurerments of ultrasonic signals caused by corona discharges were perforrred by using an ultrasonic meeasurerment technique to analyze the deve1qxrent states of coronas in a high-voltage power apparatus. We also examined the relationship between discharge magnitude and ultrasonic pulse number to diagnose the deterioration of electrical insulation by corona discharges. From these results, it was found that ultrasonic signals due to corona discharges can be firstly detected at the peak value of positive polarities prior to the breakdown voltages, and the magnitude of ultrasonic signals was closely related to the current pulses by the corona discharges when ac voltages were gradually raised, and it appeared that ultrasonic pulse number was proportional to discharge magnitude. Attenuation, tirre-delaying and directivity charocteristics of ultrasonic signals propagated to air by using ultrasonic oscillation and receiving systems are feJXlrt.ed as a basic data of ultrasonic measurements in out-door HV apparatus.aratus.

• Journal of Sensor Science and Technology
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• v.6 no.4
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• pp.298-306
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• 1997

Ultrasonic sensors are widely used in various applications due to advantages of low cost, simplicity in construction, mechanical robustness, and little environmental restriction in usage. But the main purposes of the noncontact sensors are rather narrowly confined within object detection and distance measurement. For the application of object recognition, ultrasonic sensors exhibit several shortcomings of poor directionality which results in low spatial resolution of an object, and specularity which gives frequent erroneous range readings. To resolve these problems in object recognition, an array of the sensors has been used. To improve the spatial resolution, more number of sensors are used in essence throughout the various devices of the sensor arrays. Under the disguise of a fixed number of the sensors, the array can be shifted mechanically in several steps. In this paper we propose a practical sensor resolution enhancement method using an electronic circuit accompanying the sensor array. The circuit changes the transmitter output voltage in several steps. Using the known sensor characteristics, a set of different return echo signals provide enhanced spatial resolution. The improvement is obtained without the cost of the increased number of the sensors nor extra mechanical devices.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.490-492
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• 2010

A swing level controlled voltage-mode transmitter is proposed to support a stub series-terminated logic channel with center-tapped termination. This transmitter provides a swing level control to support the diagnostic mode and improve the signal integrity in the absence of the destination termination. By using the variable parallel termination, the proposed transmitter maintains the constant output impedance of the source termination while the swing level is controlled. Also, the series termination using an external resistor is used to reduce the impedance mismatch effect due to the parasitic components of the capacitor and inductor. To verify the proposed transmitter, the voltage-mode driver, which provides eight swing levels with the constant output impedance of about $50{\Omega}$, was implemented using a 70nm 1-poly 3-metal DRAM process with a 1.5V supply. The jitter reduction of 54% was measured with the swing level controlled voltage-mode driver in the absence of the destination termination at 1.6-Gb/s.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.2
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• pp.19-24
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• 2007

With recent advancement of high-speed, multi-gigabit data transmission capabilities, serial links have been more widely adopted in industry than parallel links. Since the parallel link design forces its transmitter to transmit both the data and the clock to the receiver at the same time, it leads to hardware's intricacy during high-speed data transmission, large power consumption, and high cost. Meanwhile, the serial links allows the transmitter to transmit data only with no synchronized clock information. For the purpose, clock and data recovery circuit becomes a very crucial key block. In this paper, a 5.4Gbps half-rate bang-bang CDR is designed for the applications of high-speed graphic DRAM interface. The CDR consists of a half-rate bang-bang phase detector, a current-mirror charge-pump, a 2nd-order loop filter, and a 4-stage differential ring-type VCO. The PD automatically retimes and demultiplexes the data, generating two 2.7Gb/s sequences. The proposed circuit is realized in 66㎚ CMOS process. With input pseudo-random bit sequences (PRBS) of $2^{13}-1$, the post-layout simulations show 10psRMS clock jitter and $40ps_{p-p}$ retimed data jitter characteristics, and also the power dissipation of 80mW from a single 1.8V supply.