• Journal of KIISE:Information Networking
• /
• v.34 no.3
• /
• pp.226-238
• /
• 2007

In this paper, we present a novel fully distributed topology control protocol that can construct the multiple-ring topology of Minimal Connected Dominating Set (MCDS) as the transport backbone for mobile ad hoc networks. It makes a topology from the minimal nodes that are chosen from all the nodes, and the constructed topology is comprised of the minimal physical links while preserving connectivity. This topology reduces the interference. The all nodes work as the nodes of the distributed parallel Boltzmann machine, of which the objective function is consisted of two Boltzmann factors: the link degree and the connection domination degree. To define these Boltzmann factors, we extend the Connected Dominating Set into a fuzzy set, and also define the fuzzy set of nodes by which the multiple-ring topology can be constructed. To construct the transport backbone of the mobile ad hoc network, the proposed protocol chooses the nodes that are the strong members of these two fuzzy sets as the clusterheads. We also ran simulations to provide the quantitative comparison against the related works in terms of the packet loss rate and the energy consumption rate. As a result, we show that the network that is constructed by the proposed protocol has far better than the other ones with respect to the packet loss rate and the energy consumption rate.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.21 no.3
• /
• pp.613-619
• /
• 2017

In this paper, DF(Dual Fuel) Generator modeling, which uses both conventional diesel fuel and LNG fuel, has been performed and monitoring system has been developed based on MATLAB/SIMULINK for the development of PMS(Power Management System) HILS(Hardware In the Loop Simulation). The principal components modeling of DF Generator are DF engine which provides the mechanical power and synchronous generator which convert the mechanical power into electrical power. Submodels, such as throttle body, intake manifold, torque generation and mass of LNG and diesel Quantity are used to perform DF engine. Also, governor is used for load sharing between paralleled DF generators to share a total load that exceeds the capacity of a single generator. To verify modeling of DF Generator designated ship lumped load Simulation is carried out. A validity of DF Generator has been verified by comparison between simulation results and estimated result from the designated lumped load.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.48 no.4
• /
• pp.39-50
• /
• 2011

In this paper, we presents a CDR circuit for $2^{nd}$-generation AiPi+, one of the Intra-panel Interface. The speed of the proposed clock and data recovery is increased to 1.25 Gbps compared with that of AiPi+. The DLL-based CDR architecture is used to generate the multi-phase clocks. We propose the simple scheme for frequency detector (FD) to mitigate the harmonic-locking and reduce the complexity. In addition, the duty cycle corrector that limits the maximum pulse width is used to avoid the problem of missing clock edges due to the mismatch between rising and falling time of VCDL's delay cells. The proposed CDR is implemented in 0.18 um technology with the supply voltage of 1.8 V. The active die area is $660\;{\mu}m\;{\times}\;250\;{\mu}m$, and supply voltage is 1.8 V. Peak-to-Peak jitter is less than 15 ps and the power consumption of the CDR except input buffer, equalizer, and de-serializer is 5.94 mW.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.51 no.3
• /
• pp.164-173
• /
• 2014

In underwater robotics, vision would be a key element for recognition in underwater environments. However, due to turbidity an underwater optical camera is rarely available. An underwater imaging sonar, as an alternative, delivers low quality sonar images which are not stable and accurate enough to find out natural objects by image processing. For this, artificial landmarks based on the characteristics of ultrasonic waves and their recognition method by a shape matrix transformation were proposed and were proven in Part 1. But, this is not working properly in undulating and dynamically noisy sea-bottom. To solve this, we propose a framework providing a selection phase of likelihood candidates, a selection phase for final candidates, recognition phase and tracking phase in sequence images, where a particle filter based selection mechanism to eliminate fake candidates and a mean shift based tracking algorithm are also proposed. All 4 steps are running in parallel and real-time processing. The proposed framework is flexible to add and to modify internal algorithms. A pool test and sea trial are carried out to prove the performance, and detail analysis of experimental results are done. Information is obtained from tracking phase such as relative distance, bearing will be expected to be used for control and navigation of underwater robots.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.49 no.11
• /
• pp.86-94
• /
• 2012

In this paper we propose a hardware architecture of high-speed CGH (computer generated hologram) generation processor, which particularly reduces the number of memory access times to avoid the bottle-neck in the memory access operation. For this, we use three main schemes. The first is pixel-by-pixel calculation rather than light source-by-source calculation. The second is parallel calculation scheme extracted by modifying the previous recursive calculation scheme. The last one is a fully pipelined calculation scheme and exactly structured timing scheduling by adjusting the hardware. The proposed hardware is structured to calculate a row of a CGH in parallel and each hologram pixel in a row is calculated independently. It consists of input interface, initial parameter calculator, hologram pixel calculators, line buffer, and memory controller. The implemented hardware to calculate a row of a $1,920{\times}1,080$ CGH in parallel uses 168,960 LUTs, 153,944 registers, and 19,212 DSP blocks in an Altera FPGA environment. It can stably operate at 198MHz. Because of the three schemes, the time to access the external memory is reduced to about 1/20,000 of the previous ones at the same calculation speed.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.10
• /
• pp.31-38
• /
• 2008

This paper describes sensor network system implementation for the IEEE 1451.2 standard which guarantees compatibilities between various wired sensors. The proposed system consists of the Network Capable Application Processor(NCAP) in the IEEE 1451.0, the Transducer Independent Interface(TII) in the IEEE 1451.2, the Transducer Electronic Data Sheet(TEDS) and sensors. The research goal of this study is to minimize and optimize system complexity for IC design. The NCAP is implemented using C language in personal computer environment. TII is used in the parallel port between PC and an FPGA application board. Transducer is implemented using Verilog on the FPGA application board. We verified the proposed system architecture based on the standards.

• The KIPS Transactions:PartA
• /
• v.19A no.2
• /
• pp.77-84
• /
• 2012

Speculative execution for improving instruction-level parallelism is widely used in high-performance processors. In the speculative execution technique, the most important factor is the accuracy of branch predictor. Unfortunately, complex branch predictors for improving the accuracy can cause serious thermal problems in 3D multicore processors. Thermal problems have negative impact on the processor performance. This paper analyzes two methods to solve the thermal problems in the branch predictor of 3D multi-core processors. First method is dynamic thermal management which turns off the execution of the branch predictor when the temperature of the branch predictor exceeds the threshold. Second method is thermal-aware branch predictor placement policy by considering each layer's temperature in 3D multi-core processors. According to our evaluation, the branch predictor placement policy shows that average temperature is $87.69^{\circ}C$, and average maximum temperature gradient is $11.17^{\circ}C$. And, dynamic thermal management shows that average temperature is $89.64^{\circ}C$ and average maximum temperature gradient is $17.62^{\circ}C$. Proposed branch predictor placement policy has superior thermal efficiency than the dynamic thermal management. In the perspective of performance, the proposed branch predictor placement policy degrades the performance by 3.61%, while the dynamic thermal management degrades the performance by 27.66%.

• KSCE Journal of Civil and Environmental Engineering Research
• /
• v.38 no.2
• /
• pp.303-310
• /
• 2018

One of most shocking headlines is a serious chain collision accident (CCA). The development of CCA has a temporal and spatial locality, and the information of the CCA is time-critical. Due to these characteristics of CCA, traffic accident information should be rapidly propagated to drivers in order to reduce chain collisions, right after the first accident occurs. Inter-vehicle communication (IVC) based on ad-hoc communication is one of promising alternatives for locally urgent information propagation. Despite this potential of IVC, research for the effects of IVC on the reduction of CCA has not been reported so far. Therefore, this study develops the parallel platform of microscopic vehicle and IVC communication simulators and then analyses the effects of IVC on the reduction of the second collision related to a series of vehicles. To demonstrate the potential of the IVC-based propagation of urgent traffic accident information for the reduction of CCA, the reduction of approaching-vehicle speed, the propagation speed of accident information, and then the reduction of CCA were analysed, respectively, according to scenarios of combination of market rates and traffic volumes. The analysis results showed that CCA can be effectively reduced to 40~60% and 80~82% at the penetration rates of 10% and 50%, respectively.

• The KIPS Transactions:PartA
• /
• v.18A no.1
• /
• pp.1-10
• /
• 2011

Physical modeling has been widely used for sound synthesis since it synthesizes high quality sound which is similar to real-sound for musical instruments. However, physical modeling requires a lot of parameters to synthesize a large number of sounds simultaneously for the musical instrument, preventing its real-time processing. To solve this problem, this paper proposes a single instruction, multiple data (SIMD) based multi-core processor that supports real-time processing of sound synthesis of gayageum which is a representative Korean traditional musical instrument. The proposed SIMD-base multi-core processor consists of 12 processing elements (PE) to control 12 strings of gayageum in which each PE supports modeling of the corresponding string. The proposed SIMD-based multi-core processor can generate synthesized sounds of 12 strings simultaneously after receiving excitation signals and parameters of each string as an input. Experimental results using a sampling reate 44.1 kHz and 16 bits quantization show that synthesis sound using the proposed multi-core processor was very similar to the original sound. In addition, the proposed multi-core processor outperforms commercial processors(TI's TMS320C6416, ARM926EJ-S, ARM1020E) in terms of execution time ($5.6{\sim}11.4{\times}$ better) and energy efficiency (about $553{\sim}1,424{\times}$ better).

• The Journal of The Korea Institute of Intelligent Transport Systems
• /
• v.10 no.6
• /
• pp.53-62
• /
• 2011

Although the demand of Variable Message Sign(VMS) has become pervasive in fulfilling the ITS policy, there are still several unsolved problematic issues. The most critical ones of them are inequality and inefficiency of providing traffic information. This paper proposes the Infra-free Variable Message Sign in order to provide useful informations such as road condition, weather, and traffic of the area, where constructing the infrastructure of communication and power supply is relatively very hard. First of all, the characteristics of infra-free Variable Message Sign are studied and analyzed in deep because of differences between normal Variable Message Sign and Infra-free Variable Message Sign in the configuration and the operating method due to the nature of the Infra-free Variable Message Sign. Futhermore, for effective power management of operating Infra-free Variable Message Sign with limited power acquired through stand-alone PV system, new battery connection structure and dynamically variable power managements for the differently shown messages on Variable Message Sign are proposed. The proposed structure in this paper can be applied to not only power management for Infra-free Variable Message Sign but also power management for the various applications using parallel connection battery system.