• Economic and Environmental Geology
• /
• v.49 no.4
• /
• pp.269-280
• /
• 2016

I presented three vector crustal magnetic anomaly components and six gradients by using spherical Slepian functions over the cap area of $20^{\circ}$ of radius centered on the South Pole. The Swarm mission, launched by European Space Agency(ESA) in November of 2013, was planned to put three satellites into the low-Earth orbits, two in parallel in East-West direction and one in cross-over of the higher altitude. This orbit configuration will make the gradient measurements possible in North-South direction, vertical direction, as well as E-W direction. The gravity satellites, such as GRACE and GOCE, have already implemented their gradient measurements for recovering the accurate gravity of the Earth and its temporal variation due to mass changes on the subsurface. However, the magnetic gradients have little been applied since Swarm launched. A localized magnetic modeling method is useful in taking an account for a region where data availability was limited or of interest was special. In particular, computation to get the localized solutions is much more efficient and it has an advantage of presenting high frequency anomaly features with numbers of solutions fewer than the global ones. Besides, these localized basis functions that were done by a linear transformation of the spherical harmonic functions, are orthogonal so that they can be used for power spectrum analysis by transforming the global spherical harmonic coefficients. I anticipate in scientific and technical progress in the localized modeling with the gradient measurements from Swarm and here will do discussion on the results of the localized solution to represent the three vector and six gradient anomalies over the Antarctic area from the synthetic data derived from a global solution of the spherical harmonics for the crustal magnetic anomalies of Swarm measurements.

• Applied Chemistry for Engineering
• /
• v.24 no.1
• /
• pp.31-37
• /
• 2013

Lowering surface reflectance of Si wafers by texturization is one of the most important processes for improving the efficiency of Si solar cells. This paper presents the results on the effect of texturing using acidic solution mixtures containing the catalytic agents to moderate etching rates on the surface morphology of mc-Si wafer as well as on the performance parameters of solar cell. It was found that the treatment of contaminated crystalline silicon wafer with $HNO_3-H_2O_2-H_2O$ solution before the texturing helps the removal of organic contaminants due to its oxidizing properties and thereby allows the formation of nucleation centers for texturing. This treatment combined with the use of a catalytic agent such as phosphoric acid improved the effects of the texturing effects. This reduced the reflectance of the surface, thereby increased the short circuit current and the conversion efficiency of the solar cell. Employing this technique, we were able to fabricate mc-Si solar cell of 16.4% conversion efficiency with anti-reflective (AR) coating of silicon nitride film using plasma-enhanced chemical vapor deposition (PECVD) and Si wafers can be texturized in a short time.

• Geophysics and Geophysical Exploration
• /
• v.22 no.4
• /
• pp.225-238
• /
• 2019

Migration velocity analysis (MVA) for creating optimum depth-domain velocities in seismic imaging was applied to marine long-offset multi-channel data, and the effectiveness of the MVA approach was demonstrated by the combinations of conventional data processing procedures. The time-domain images generated by conventional time-processing scheme has been considered to be sufficient so far for the seismic stratigraphic interpretation. However, when the purpose of the seismic imaging moves to the hydrocarbon exploration, especially in the geologic modeling of the oil and gas play or lead area, drilling prognosis, in-place hydrocarbon volume estimation, the seismic images should be converted into depth domain or depth processing should be applied in the processing phase. CMP-based velocity analysis, which is mainly based on several approximations in the data domain, inherently contains errors and thus has high uncertainties. On the other hand, the MVA provides efficient and somewhat real-scale (in depth) images even if there are no logging data available. In this study, marine long-offset multi-channel seismic data were optimally processed in time domain to establish the most qualified dataset for the usage of the iterative MVA. Then, the depth-domain velocity profile was updated several times and the final velocity-in-depth was used for generating depth images (CRP gather and stack) and compared with the images obtained from the velocity-in-time. From the results, we were able to confirm the depth-domain results are more reasonable than the time-domain results. The spurious local minima, which can be occurred during the implementation of full waveform inversion, can be reduced when the result of MVA is used as an initial velocity model.

• Journal of the Computational Structural Engineering Institute of Korea
• /
• v.31 no.2
• /
• pp.87-95
• /
• 2018

This paper introduces a new explicit spectral element method for the simulation of SH-waves in semi-infinite domains. To simulate the wave motion in unbounded domains, it is necessary to reduce the infinite extent to a finite computational domain of interest. To prevent the wave reflection from the trunctated boundaries, perfectly matched layer(PML) wave-absorbing boundary is introduced. The forward problem for simulating SH-waves in PML-truncated domains can be formulated as second-order PDEs. The second-order semi-discrete form of the governing PDEs is constructed by using a mixed spectral elements with Legendre-gauss-Lobatto quadrature method, which results in a diagonalized mass matrix. Then the second-order semi-discrete form is transformed to a first-order, whose solutions are calculated by the fourth-order Runge-Kutta method. Numerical examples showed that solutions of SH-wave in the two-dimensional analysis domain resulted in stable and accurate, and reflections from truncated boundaries could be reduced by using PML boundaries. Elastic wave propagation analysis using explicit time integration method may be apt for solving larger domain problems such as three-dimensional elastic wave problem more efficiently.

• Korean Journal of Optics and Photonics
• /
• v.16 no.6
• /
• pp.535-541
• /
• 2005

We report on the development of a passively mode-locked near-infrared femtosecond laser with Cr:YAG crystal that operates near room temperature. The laser wavelength could easily be tuned by using only the internal prism pair over 110 nm from 1400 nm to 1510 nm in cw and over about 30 nm in mode-locked operation, respectively Maximum cw output powers of 810 mW were obtained with $1.5 \%$ output coupler for absorbed pump powers of 7.6 W. For compensation of the internal group velocity dispersion, an IR graded prism pair was used. The Cr:YAG laser delivered nearly Fourier-transform limited pulses with a pulse duration as short as 64 fs at 100 MHz repetition rate. In the mode-locked regime, the laser was operating at 1510 nm with a spectral bandwidth of 44 nm. In order to avoid unstable mode-locking and power instabilities, self-built tubes were inserted into the beam path in the resonator and purged with N2 gas. Finally, output powers of the Cr:YAG laser were optimized to 250 mW fer long time stable mode-locked operation.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.8
• /
• pp.56-63
• /
• 2010

This work proposes a 12b 100MS/s 0.13um CMOS pipeline ADC for battery-powered mobile video applications such as DVB-Handheld (DVB-H), DVB-Terrestrial (DVB-T), Satellite DMB (SDMB), and Terrestrial DMB (TDMB) requiring high resolution, low power, and small size at high speed. The proposed ADC employs a three-step pipeline architecture to optimize power consumption and chip area at the target resolution and sampling rate. A single shared and switched op-amp for two MDACs removes a memory effect and a switching time delay, resulting in a fast signal settling. A two-step reference selection scheme for the last-stage 6b FLASH ADC reduces power consumption and chip area by 50%. The prototype ADC in a 0.13um 1P7M CMOS technology demonstrates a measured DNL and INL within 0.40LSB and 1.79LSB, respectively. The ADC shows a maximum SNDR of 60.0dB and a maximum SFDR of 72.4dB at 100MS/s, respectively. The ADC with an active die area of 0.92 $mm^2$ consumes 24mW at 1.0V and 100MS/s. The FOM, power/($f_s{\times}2^{ENOB}$), of 0.29pJ/conv. is the lowest of ever reported 12b 100MS/s ADCs.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.18 no.7
• /
• pp.1777-1783
• /
• 2014

In this paper, we designed and fabricated a high-speed semiconductor sensor for use in power control devices and analyzed the characteristics with pulsed radiation tests. At first, radiation sensitive circular Si PIN diodes with various diameters(0.1 mm ~5.0 mm) were designed and fabricated using Si epitaxial wafer, which has a $42{\mu}m$ thick intrinsic layer. The reverse leakage current of the diode with a radius of 2 mm at a reverse bias of 30 V was about 20.4 nA. To investigate the characteristic responses of the developed diodes, the pulsed gamma-radiation tests were performed with the intensity of 4.88E8 rad(Si)/sec. From the test results showing that the output currents and the rising speeds have a linear relationship with the area of the sensors, we decided that the optimal condition took place at a 2 mm diameter. Next, for the selected 2 mm diodes, dose rate tests with a range of 2.47E8 rad(Si)/sec to 6.21E8 rad(Si)/sec were performed. From the results, which showed linear characteristics with the radiation intensity, a large amount of photocurrent over 60mA, and a high speed response under 350ns without saturation, we can conclude that the our developed PIN diode can be a good candidate for the sensor of power control devices.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.37 no.8B
• /
• pp.668-676
• /
• 2012

In this paper, on the assumption that MPI collective communication function is converted into a group of point-to-point communication functions in the transaction level, an algorithm that optimizes broadcast, scatter and gather function among MPI collective communication is proposed. The MPI hardware engine that operates the proposed algorithm was designed, and it was named the OCC-MPE (Optimized Collective Communication Message Passing Engine). The OCC-MPE operates point-to-point communication by using the standard send mode. The transmission order is arranged according to the algorithm that proposes the most frequently used broadcast, scatter and gather functions among the collective communications, so the whole communication time is reduced. To measure the performance of the proposed algorithm, the OCC-MPE with the Bus Functional Model (BFM) based on SystemC was designed. After evaluating the performance through the BFM based on SystemC, the proposed OCC-MPE is designed by using VerilogHDL. As a result of synthesizing with the TSMC $0.18{\mu}m$, the gate count of each OCC-MPE is approximately 1978.95 with four processing nodes. That occupies approximately 4.15% in the whole system, which means it takes up a relatively small amount. Improved performance is expected with relatively small amounts of area increase if the OCC-MPE operated by the proposed algorithm is added to the MPSoC (Multi-Processor System on a Chip).

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.3
• /
• pp.60-68
• /
• 2008

This work describes a re-configurable 10MS/s to 100MS/s, low-power 10b two-step pipeline ADC operating at a power supply from 0.5V to 1.2V. MOS transistors with a low-threshold voltage are employed partially in the input sampling switches and differential pair of the SHA and MDAC for a proper signal swing margin at a 0.5V supply. The integrated adjustable current reference optimizes the static and dynamic performance of amplifiers at 10b accuracy with a wide range of supply voltages. A signal-isolated layout improves the capacitor mismatch of the MDAC while a switched-bias power-reduction technique reduces the power dissipation of comparators in the flash ADCs. The prototype ADC in a 0.13um CMOS process demonstrates the measured DNL and INL within 0.35LSB and 0.49LSB. The ADC with an active die area of $0.98mm^2$ shows a maximum SNDR and SFDR of 56.0dB and 69.6dB, respectively, and a power consumption of 19.2mW at a nominal condition of 0.8V and 60MS/s.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.3
• /
• pp.77-85
• /
• 2008

This work proposes a 12b 130MS/s 108mW $1.8mm^2$ 0.18um CMOS ADC for high-quality video systems such as TFT-LCD displays and digital TVs requiring simultaneously high resolution, low power, and small size at high speed. The proposed ADC optimizes power consumption and chip area at the target resolution and sampling rate based on a three-step pipeline architecture. The input SHA with gate-bootstrapped sampling switches and a properly controlled trans-conductance ratio of two amplifier stages achieves a high gain and phase margin for 12b input accuracy at the Nyquist frequency. A signal-insensitive 3D-fully symmetric layout reduces a capacitor and device mismatch of two MDACs. The proposed supply- and temperature- insensitive current and voltage references are implemented on chip with a small number of transistors. The prototype ADC in a 0.18um 1P6M CMOS technology demonstrates a measured DNL and INL within 0.69LSB and 2.12LSB, respectively. The ADC shows a maximum SNDR of 53dB and 51dB and a maximum SFDR of 68dB and 66dB at 120MS/s and 130MS/s, respectively. The ADC with an active die area of $1.8mm^2$ consumes 108mW at 130MS/s and 1.8V.