• Title/Summary/Keyword: 바이어스 전류

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Implementation of 10 Gb/s 4-Channel VCSELs Driver Chip for Output Stabilization Based on Time Division Sensing Method (시분할 센싱 기법 기반의 출력 안정화를 위한 10 Gb/s 4채널 VCSELs 드라이버의 구현)

  • Yang, Choong-reol;Lee, Kang-yoon;Lee, Sang-soo;Jung, Whan-seok
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.7
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    • pp.1347-1353
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    • 2015
  • We implemented a 10 Gb/s 4-channel vertical cavity surface emission lasers (VCSEL) driver array in a $0.13{\mu}m$ CMOS process technology. To enhance high current resolution, power dissipation, and chip space area, digital APC/AMC with time division sensing technology is primarily adopted. The measured -3 dB frequency bandwidth is 9.2 GHz; the small signal gain is 10.5 dB; the current resolution is 0.01 mA/step, suitable for the wavelength operation up to 10 Gb/s over a wide temperature range. The proposed APC and AMC demonstrate 5 to 20 mA of bias current control and 5 to 20 mA of modulation current control. The whole chip consumes 371 mW of low power under the maximum modulation and bias currents. The active chip size is $3.71{\times}1.3mm^2$.

Electrical Properties of MOS Capacitors Irradiated with $CO^{60}-\gamma$ Ray ($CO^{60}-\gamma$선이 조사된 MOS Capacitors에서의 전기적 특성)

  • 권순석;박흥우;임기조;류부형;강성화
    • Journal of the Korean Vacuum Society
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    • v.4 no.4
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    • pp.402-406
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    • 1995
  • MOS(금속 산화막 반도체 접합) 소자가 방사선에 노출되면, 산화막재에 양의 공간전하가 생성되고 Si-SiO2 계면에 계면준위가 생성된다. MOS 커패시터의 방사선 조사효과를 방사선 피폭량과 산화막의 두께를 달리하는 시편에서 정전용량과 전류변화를 측정하여 고찰하였다. 정전용량-바이어스 전압 특성 실험결과로부터 플렛밴드 전압 및 계면상태밀도를 계산하였다. 또한 전압-전류 특성은 방사선 조사로 산화막내에 생성된 양의 공간전하와 Si-SiO2 계면에 포획된 전하에 의해서 설명이 가능하였다.

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Degradation of Si BJT Leakage Current by High Temperature Reverse Collector-Base Bias Stress (고온 콜렉터-베이스 역전압 바이어스에 의한 BJT 누설전류 특성 열화)

  • Choi, Sung-Soon;Oh, Chul-Min;Lee, Kwan-Hoon;Song, Byeong-Suk
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.151-151
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    • 2008
  • 바이폴러 트랜지스터(이하 BJT)의 고온 콜렉터-베이스 역전압 수명시험을 실시하였고, 수영시험 전후의 특성평가를 통해 BJT의 고장모드를 분석하였다. 시험조건은 주위온도 $150^{\circ}C$에서 콜렉터-베이스 정격 역전압의 80%를 인가한 상태에서 실시하였으며, 시료수는 57개이고 최종 목표 시험시간은 2,000시간이다. 중간측정을 통해 BJT의 특성열화를 관찰하였으며, 1,500시간 경과 후 1개 시료에서 제품규격을 벗어나는 데이터가 측정되었다. 해당 시료를 분석한 결과 콜렉터-베이스 누설전류 및 전류이득($\beta$)이 증가하였고, 저주파에서의 junction capacitance 가 정상품 대비 크게 관찰되었다. 측정결과를 통해 누설전류 증가 및 이득이 증가한 원인을 추정하였다.

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Analysis of parametric amplification in a semiconductor laser using perturbation theory (섭동이론을 이용한 반도체 레이저에서의 매개증폭 해석)

  • 조성대;이창희;신상영
    • Korean Journal of Optics and Photonics
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    • v.11 no.3
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    • pp.187-192
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    • 2000
  • We analyze the parametric amplification by the nonlinear characteristics in a semiconductor laser using a perturbation theory and discuss its result. The parametric gain increases with increase of the pump modulation current. It is due to shift of the resonance frequency as the pump modulation current increases. However, it decreases with increase of the bias current and damping constant. Also, it needs phase matching between the pump modulation current and signal modulation current to maximize the parametric gain. The gain decreases for a large signal modulation current due to the saturation of the amplified power. power.

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A study on the CFT error reduction of switched-current system (전류 스위칭 시스템의 CFT 오차 감소에 관한 연구)

  • 최경진;이해길;신홍규
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.5
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    • pp.1325-1331
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    • 1996
  • In this paper, a new current-memory circuit is proposed that reduces the clock feedthrough(CFT) error voltage causing total harmonic distortion(THD) increment in switched-current(SI) systems. Using PMOS transistor in CMOS complementary, the proposed one reduces output distortion current due to the CFT errorvoltage. A proposed current-memory is designed using a 1.2.mu.m CMOS process anda 1MHz sinusoidal signal having a 68.mu.A amplitude current is applied as input (sampling frequency:20MHz). It hasbeen shown from the simulation that the output distortion current effected by the CFT error voltage is reduced by approximately 10 times the error voltage of conventional one, THD is -57dB in case ofappling 1kHz frequency input signalwith 0.5 peak signal-to-bias current ratio.

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The Results Comparison of Measurement and Simulations in ISL(Integrated Schottky Logic) Gate (ISL 게이트에서 측정과 시뮬레이션의 결과 비교)

  • 이용재
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.1
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    • pp.157-165
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    • 2001
  • We analyzed the electrical characteristics of platinum silicide schottky junction to develope the voltage swing in Integrated Schottky Logic gates, and simulated the characteristics with the programs in this junctions. Simulation programs for analytic characteristics are the Medichi tool for device structure, Matlab for modeling and SUPREM V for fabrication process. The silicide junctions consist of PtSi and variable silicon substrate concentrations in ISL gates. Input parameters for simulation characteristics were the same conditions as process steps of the device farications process. The analitic electrical characteristics were the turn-on voltage, saturation current, ideality factor in forward bias, and has shown the results of breakdown voltage between actual characteristics and simulation characteristics in reverse bias. As a result, the forward turn-on voltage, reverse breakdown voltage, barrier height were decreased but saturation current and ideality factor were increased by substrates increased concentration variations.

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DESIGN OF THE RLG CURRENT STABILIZER CIRCUIT FOR ATTITUDE CONTROL IN THE SATELLITE (위성 자세제어용 RLG 전류 안정화 회로 설계)

  • Kim Eui-Chan;Choi Jae-Dong
    • Journal of Astronomy and Space Sciences
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    • v.23 no.2
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    • pp.161-166
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    • 2006
  • In this paper, we describe the RLG current stabilizer circuit for attitude control in the satellite. The RLG makes use of the Sagnac effect within a resonant of a HeNe laser. The difference between two discharge currents causes one of the gyro bias errors. The theoretical background and current stabilizer are introduced. It is verified that the circuit designed is applicable to the test of input voltage and temperature.

Current-controllable saw-tooth waveform generators using current-tunable Schmitt trigger (전류-제어 슈미트 트리거를 이용한 전류-제어 톱니파 발생기)

  • Chung, Won-Sup;Lee, Myung-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.7 s.361
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    • pp.31-36
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    • 2007
  • A saw-tooth waveform generator whose frequency can be controlled with a do bias current is proposed. The generator utilizes operational transconductance amplifiers (OTA's) as switching element. It features simple and wide sweep capability The circuit built with commercially avaliable components exhibits good linearity of current-to-frequency transfer characteristics and relatively low temperature sensitivity.

Comparative Study of Performance of Switching Control and Synchronous Notch Filter Control for Active Magnetic Bearings (능동 자기 베어링을 위한 동기 노치필터 제어기와 스위칭 제어기의 성능 비교 연구)

  • Yoo, Seong Yeol;Noh, Myounggyu
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.37 no.4
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    • pp.511-519
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    • 2013
  • Switching controllers for active magnetic bearings are claimed to minimize the copper losses because they do not use bias currents. In this study, we compare the performances of the switching controller with those of the widely used proportional-derivative (PD) controller. The PD controller is combined with a synchronous notch filter to reduce the effect of the unbalance disturbance. For a fair and objective comparison, the PD controller is designed systematically. The switching controller is designed so that the dynamics of the two controllers are almost identical. A system model is developed. This model includes the flexible modes of the rotor and the dynamics of the sensors and amplifiers. The simulation results show that the switching controller indeed reduces the copper loss at lower speeds. However, it fails to operate around the speed close to the bending mode of the rotor.