• Title/Summary/Keyword: 멀티미디어 회의 시스템

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Video Indexing for Efficient Browsing Environment (효율적인 브라우징 환경을 위한 비디오 색인)

  • Ko, Byong-Chul;Lee, Hae-Sung;Byun, Hye-Ran
    • Journal of KIISE:Software and Applications
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    • v.27 no.1
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    • pp.74-83
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    • 2000
  • There is a rapid increase in the use of digital video information in recent years. Especially, user requires the environment which retrieves video from passive access to active access, to be more efficiently. we need to implement video retrieval system including video parsing, clustering, and browsing to satisfy user's requirement. In this paper, we first divide video sequence to shots which are primary unit for automatic indexing, using a hybrid method with mixing histogram method and pixel-based method. After the shot boundaries are detected, corresponding key frames can be extracted. Key frames are very important portion because they help to understand overall contents of video. In this paper, we first analyze camera operation in video and then select different number of key frames depend on shot complexity. At last, we compose panorama images from shots which are containing panning or tilting in order to provide more useful and understandable browsing environment to users.

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최근접 질의를 위한 고차원 인덱싱 방법

  • Kim, Sang-Uk;Aggarwal, Charu;Yu, Philip
    • Journal of KIISE:Databases
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    • v.28 no.4
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    • pp.632-642
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    • 2001
  • The nearest neighbor query is an important operation widely used in multimedia databases for finding the object that is most similar to a given object Most of techniques for processing nearest neighbor queries employ multidimensional indexes for effective indexing of objects. However, the performance of previous multidimensional indexes, which use N-dimensional rectangles or spheres for representing the capsule of the object cluster, deteriorates seriously as th number of dimensions gets higher, In this paper we first point out the fact that the simple representation of capsuler incurs performance degradation in processing nearest neighbor queries. For alleviating this problem,. we propose(1) adopting new axis systems appropriate to a given cluster (2) representing various shapes of capsules by combining rectangles and spheres, and (3) maintaining outliers separately, We also verify the superiority of our approach through performance evaluation by performing extensive experiments.

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A Study on the User Identification and Authentication in the Smart Mirror in Private (사적공간의 스마트미러에서 사용자 식별 및 인증 기법 연구)

  • Mun, Hyung-Jin
    • Journal of Convergence for Information Technology
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    • v.9 no.7
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    • pp.100-105
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    • 2019
  • As IoT Technology develops and Era of Hyperconnectivity comes, various kinds of customized services became available. As a next-generation display, a smart mirror accesses multimedia devices and provides various services, so it can serve as a social learning tool for the children and the old ones, as well as adults who need information. Smart Mirror must be able to identify users for individualized services. However, since the Smart Mirror is an easily accessible device, there is a possibility that information such as an individual's pattern and habit stored in the smart mirror may be exposed to the outside. Also, the other possibility of leakage of personal location information is through personal schedule or appointment stored in the smart mirror, and another possibility that privacy can be violated is through checking the health state via personal photographs. In this research, we propose a system that identify users by the information the users registered about their physique just like their face, one that provides individually customized service to users after identifying them, and one which provides minimal information and service for unauthenticated users.

ZVS Phase Shift Full Bridge Converter Design with 2kW Output (2 kW 출력을 갖는 영전압 스위칭 위상 천이 풀 브리지 컨버터 설계)

  • Hwang, Kyu-Il;Kim, Il-Song
    • Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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    • v.8 no.11
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    • pp.523-530
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    • 2018
  • It has been studied over the long time for the high efficiency and high power density of the power converter. It is possible to obtain higher power conversion efficiency and small volume by increasing switching frequency, however, the switching loss is also increased. The soft switching technique can overcome of the above deficiency. The design and analysis method for ZVS(Zero Voltage Switching) Phase Shifte Full bridge converter is presented in this paper. The power transfer depends on the phase difference between two legs of the power stage and the maximum power conversion efficiency is achieved by the optimum leakage inductance value. The waveform of the current and voltage of the operational mode is analysed and the corresponding switch status is plotted as on/off status. A ZVS full bridge converter for a communication rectifier with 2kW output power is implemented and its performance are verified through PSIM software simulation and experimental results.

Design of a Low Power Reconfigurable DSP with Fine-Grained Clock Gating (정교한 클럭 게이팅을 이용한 저전력 재구성 가능한 DSP 설계)

  • Jung, Chan-Min;Lee, Young-Geun;Chung, Ki-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.2
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    • pp.82-92
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    • 2008
  • Recently, many digital signal processing(DSP) applications such as H.264, CDMA and MP3 are predominant tasks for modern high-performance portable devices. These applications are generally computation-intensive, and therefore, require quite complicated accelerator units to improve performance. Designing such specialized, yet fixed DSP accelerators takes lots of effort. Therefore, DSPs with multiple accelerators often have a very poor time-to-market and an unacceptable area overhead. To avoid such long time-to-market and high-area overhead, dynamically reconfigurable DSP architectures have attracted a lot of attention lately. Dynamically reconfigurable DSPs typically employ a multi-functional DSP accelerator which executes similar, yet different multiple kinds of computations for DSP applications. With this type of dynamically reconfigurable DSP accelerators, the time to market reduces significantly. However, integrating multiple functionalities into a single IP often results in excessive control and area overhead. Therefore, delay and power consumption often turn out to be quite excessive. In this thesis, to reduce power consumption of dynamically reconfigurable IPs, we propose a novel fine-grained clock gating scheme, and to reduce size of dynamically reconfigurable IPs, we propose a compact multiplier-less multiplication unit where shifters and adders carry out constant multiplications.

An Improvement of Implementation Method for Multi-Layer AHB BusMatrix (ML-AHB 버스 매트릭스 구현 방법의 개선)

  • Hwang Soo-Yun;Jhang Kyoung-Sun
    • Journal of KIISE:Computer Systems and Theory
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    • v.32 no.11_12
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    • pp.629-638
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    • 2005
  • In the System on a Chip design, the on chip bus is one of the critical factors that decides the overall system performance. Especially, in the case or reusing the IPs such as processors, DSPs and multimedia IPs that requires higher bandwidth, the bandwidth problems of on chip bus are getting more serious. Recently ARM proposes the Multi-Layer AHB BusMatrix that is a highly efficient on chip bus to solve the bandwidth problems. The Multi-Layer AHB BusMatrix allows parallel access paths between multiple masters and slaves in a system. This is achieved by using a more complex interconnection matrix and gives the benefit of increased overall bus bandwidth, and a more flexible system architecture. However, there is one clock cycle delay for each master in existing Multi-Layer AHB BusMatrix whenever the master starts new transactions or changes the slave layers because of the Input Stage and arbitration logic realized with Moore type. In this paper, we improved the existing Multi-Layer AHB BusMatrix architecture to solve the one clock cycle delay problems and to reduce the area overhead of the Input Stage. With the elimination of the Input Stage and some restrictions on the arbitration scheme, we tan take away the one clock cycle delay and reduce the area overhead. Experimental results show that the end time of total bus transaction and the average latency time of improved Multi-Layer AHB BusMatrix are improved by $20\%\;and\;24\%$ respectively. in ease of executing a number of transactions by 4-beat incrementing burst type. Besides the total area and the clock period are reduced by $22\%\;and\;29\%$ respectively, compared with existing Multi-layer AHB BusMatrix.

Energy-efficient Correlated Data Placement Techniques for Multi-disk-based Mobile Systems (다중 디스크 기반 모바일 시스템 대상의 에너지 효율적인 연관 데이타 배치 기법)

  • Kim, Young-Jin;Kwon, Kwon-Taek;Kim, Ji-Hong
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.3
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    • pp.101-112
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    • 2007
  • Hard disks have been the most prevalent secondary storage devices and these days their usage is becoming more important in mobile computing systems due to I/O intensive applications such as multimedia applications and games. However, significant power consumption in the disk drives still limits battery lifetimes of mobile systems critically. In this paper, we show that using several smaller disks (instead of one large disk) can be an energy-efficient secondary storage solution on typical mobile platforms without a significant performance delay. Also, we propose a novel energy-efficient technique, which clusters related data into groups and migrates the correlated groups to the same disk. We compare this method with the existing data concentration scheme, and also combine them. The experiments show that our technique saves the energy consumption up to 34% when a pair of 1.8' disks is used instead of a single 2.5' disk with a negligible increase in the average response time. The results also show that our method also saves up to 14.8% of disk energy consumption and improve the average I/O response time by up to 10 times over the existing scheme.

MPSoC Design Space Exploration Based on Static Analysis of Process Network Model (프로세스 네트워크 모델의 정적 분석에 기반을 둔 다중 프로세서 시스템 온 칩 설계 공간 탐색)

  • Ahn, Yong-Jin;Choi, Ki-Young
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.10
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    • pp.7-16
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    • 2007
  • In this paper, we introduce a new design environment for efficient multiprocessor system-on-chip design space exploration. The design environment takes a process network model as input system specification. The process network model has been widely used for modeling signal processing applications because of its excellent modeling power. However, it has limitation in predictability, which could cause severe problem for real time systems. This paper proposes a new approach that enables static analysis of a process network model by converting it to a hierarchical synchronous dataflow model. For efficient design space exploration in the early design step, mapping application to target architectures has been a crucial part for finding better solution. In this paper, we propose an efficient mapping algorithm. Our mapping algorithm supports both single bus architecture and multiple bus architecture. In the experiments, we show that the automatic conversion approach of the process network model for static analysis is performed successfully for several signal processing applications, and show the effectiveness of our mapping algorithm by comparing it with previous approaches.

An Internet Streaming Service for Digital Cinema Using Motion JPEG2000 (Motion JPEG2000을 이용한 디지털시네마 인터넷전송기술 연구)

  • Jeong, Dae-Gwon
    • Journal of Broadcast Engineering
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    • v.14 no.1
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    • pp.93-98
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    • 2009
  • While the Motion JPEG2000 has been considered as a unique encoder for digital cinema due to its high quality coding and large screen format, the realization of a digital cinema system and its service cost enormous fund and time. In this paper a digital cinema transmission system with PC and RTP protocol over the Internet is proposed, and showed how tiles of moving images are transmitted, decoded independently and combined to reconstruct and display at a large screen for digital cinema service. The simulation has been carried out for tiles of 128${\times}$128, 256${\times}$256, 512${\times}$512, and 1024${\times}$1024 pixels. In the experiment, two clients of PC’s received and decoded tiles of video and constructed whole size of moving images successfully. The PSNR’s of the video ranges 30dB to 40dB at compression rate of 160:1 and 30dB to 50dB at and below 16:1, respectively. The result showed a possibility for the reconstruction of video in multi-vision.

A Novel QoS Provisoning Scheme Based on User Mobility Patterns in IP-based Next-Generation Mobile Networks (IP기반 차세대 모바일 네트워크에서 사용자 이동패턴에 기반한 QoS 보장기법)

  • Yang, Seungbo;Jeong, Jongpil
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.5
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    • pp.25-38
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    • 2013
  • Future wireless systems will be required to support the increasingly nomadic lifestyle of people. This support will be provided through the use of multiple overlaid networks which have very different characteristics. Moreover, these networks will be required to support the seamless delivery of today's popular desktop services, such as web browsing, interactive multimedia and video conferencing to the mobile devices. Thus one of the major challenges in the design of these mobile systems will be the provision of the quality of service (QoS) guarantees that the applications demand under this diverse networking infrastructure. We believe that it is necessary to use resource reservation and adaptation techniques to deliver these QoS guarantee to applications. However, reservation and pre-configuration in the entire service region is overly aggressive, and results in schemes that are extremely inefficient and unreliable. To overcome this, the mobility pattern of a user can be exploited. If the movement of a user is known, the reservation and configuration procedure can be limited to the regions of the network a user is likely to visit. Our proposed Proxy-UMP is not sensitive to increase of the search cost than other schemes and shows that the increasing rate of total cost is low as the SMR increases.