• Journal of the Institute of Convergence Signal Processing
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• v.9 no.1
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• pp.62-74
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• 2008

In this paper, we would like to propose the design of symmetric digital filter core in order to use in the radio astronomy. The function of FIR filter core would be designed by VHDL code required at the Data Acquisition System (DAS) of Korean VLBI Network (KVN) based on the FPGA chip of Vertex-4 SX55 model of Xilinx company. The designed digital filter has the symmetric structure to increase the effectiveness of system by sharing the digital filter coefficient. The SFFU(Symmetric FIR Filter Unit) use the parallel processing method to perform the data processing efficiently by using the constrained system clock. In this paper, therefore, for the effective design of SFFU, the Unified Synthesis software ISE Foundation and Core Generator which has excellent GUI environment were used to overall IP core synthesis and experiments. Through the synthesis results of digital filter core, we verified the resource usage is less than 40% such as Slice LUT and achieved the maximum operation frequency is more than 260MHz. We also confirmed the SFFU would be well operated without error according to the SFFU simulation result using the Modelsim 6.1a of Mentor Graphics Company. To verify the function of SFFU, we carried out the additional simulation experiments using the pseudo signal to the Matlab software. From the comparison experimental results of simulation and the designed digital FIR filter, we confirmed the FIR filter was well performed with filter's basic function. So we verified the effectiveness of the designed FIR digital filter with symmetric structure using FPGA and VHDL.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.351-354
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• 2007

In recent years, digital processing techniques have been applied diversity of fields. Typical signal processing techniques are speech processing and image processing. And filters for the signal processing can be divided in FIR (finite impulse response) filter and IIR (infinite impulse response) filter. Compared with IIR filter, the FIR Filter has a defect of high-degree, but has a merit of stability and uses simply. Futhermore, FIR filter also has linear phase response characteristics, it is using in fields regarding wave information importantly. To FIR Filter design, the main issue is to remove the Gibbs phenomenon. Therefore, in this paper I was proposed a method using FIR digital filter applied a modified window function and the method was compared with conventional methods.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.11 no.5
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• pp.340-348
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• 1986

The design of two-dimensional zero-phase FIR digital filters by transformations is a popular and well-developed technique, but is suffers from the disadvantage that in its current form the filters with only four quadrant symmetry can not be designed exactly circular symmetry at frequencies far from the origin. it is shown how symmetry requirement for the filters with any number of dimensions can be fulfilled with arbbitrary percision by adapting transformation with the appropriate series expansions. this transformation has been known generally as the McClellan transformation. In this paper, a simple method for ensuring exelent circular symmetry at frequencies far from the origin is presented. This method which employs the Modified Mcclellan trnsformation for the design of 2-D FIR filter form 1-D FIR filters is quite useful for the design of 2-D FIR filters with multiple cutoff boundaries such as band-pass filters.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.649-651
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• 2016

본 연구에서는 디지털 신호에 포함되어 있는 잡음을 효과적으로 제거하기 위한 방법으로 프로그램 가능한 디지털 FIR 필터를 제안한다. 이러한 필터는 Altera의 FPGA(Field Programmable Gate Array)인 cyclone II EP2C70F89618를 이용하여 설계하고 구현하였다. 데이터 신호 잡음 제거 알고리즘을 바탕으로 한 영상 신호 제거 결과는 출력 영상으로부터 알 수 있듯이 필터 적용 후 출력 영상은 적용 전의 출력 영상에 비해 월등히 구분이 가능한 출력 영상 특성을 보임을 확인하였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.443-446
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• 2005

As modern society needs to process of acquisition, storage and transmission of much information, the importance of signal processing is increasing and various digital filters are used in the two-dimensional signal such as image. And kinds of these digital filters are IIR(infinite impulse response) filter and FIR(finite impulse response) filter. And FIR filter which has the phase linearity, the easiness of creation and stability is applied to many fields. In design of this FIR filter, flatness property is a important factor in pass-band and stop-band. In this paper, we designed a 2-D Circular FIR filter using the Bernstein polynomial, it is presented flatness property in pass-band and stop-band. And we simulated the designed filter with noisy test image and compared the results with existing methods.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.8B
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• pp.1092-1099
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• 2001

본 논문에서는 무선 통신 시스템의 중간주파수 처리 단을 디지털로 신호 처리하는 DDC(Digital Down Converter)의 저전력 아키텍처를 제안한다. FIR 필터의 계산량을 줄이기 위해서 개발된 Interpolated FIR 필터가 DDC의 데시메이션 필터로 널리 사용되고 있다. 본 논문은 이와 같은 Interpolated FIR 필터의 개념이 IIR 필터에도 적용될 수 있음을 보이고, 전력 소모와 구현 면적이 기존의 Interpolated FIR 구조보다 더욱 감소된 Interpolated IIR 필터 구조를 제안하였다. CDMA IS-95 DDC 사양의 데시메이션 필터를 FIR 구조, Interpolated FIR 구조, IIR 구조, Interpolated IIR 구조로 구현하여 이 4가지 구조들의 전력소모와 구현 면적을 비교하였으며 제안된 Interpolated IIR 구조가 기존의 Interpolated FIR 구조에 비하여 15.2%의 소모전력 감소와 35.3%의 구현면적의 감소를 달성할 수 있음을 보인다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.06a
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• pp.758-761
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• 2007

Digital signal processing technique is applied in wide fields such as speech processing, image processing and spectrum analysis. Therefore, in order to do frequency selective operation digital filter is used in stead of analog filter and sharp filter characteristics can be implemented. Since finite impulse response (FIR) digital filter as nonrecursive type represents linear phase response characteristics and is always stable and is used in fields regarding wave information importantly such as data transmission. And due to frequency characteristics, in order to remove the Gibbs phenomenon generating around a discontinuous point, filter is designed through window function method. Therefore, in this paper to improve performance of FIR digital filter, a modified window function was applied. And the proposed method was compared with conventional methods using peak side-lobe and transition properties in simulations.

• Journal of IKEEE
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• v.19 no.3
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• pp.342-348
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• 2015

High speed implementation of digital filters is required in high data rate applications such as hard-wired wide band modem and high resolution video codec. Since the critical path of the digital filter is the MAC (multiplication and accumulation) circuit, the filter coefficient with sparse non-zero bits enables high speed implementation with adders of low hardware cost. Compressive sensing has been reported to be very successful in sparse representation and sparse signal recovery. In this paper a filter design method for digital FIR filters with CSD (canonic signed digit) coefficients using compressive sensing technique is proposed. The sparse non-zero signed bits are selected in the greedy fashion while pruning the mistakenly selected digits. A few design examples show that the proposed method can be utilized for designing sparse CSD coefficient digital FIR filters approximating the desired frequency response.

• Journal of the Institute of Convergence Signal Processing
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• v.5 no.2
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• pp.159-164
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• 2004

This paper proposes a new digital filter implementation which adopts an identical structure at both behavioral and logic level in top-down design. This methodology is based on the observation that multiplication is a form of convolution and carrying, and therefore multiplication is implemented with the same structure as that of a convolution in a recursive manner at the logic level. In order to demonstrate a recursive structure-based FIR digital filter, we select L-tap transposed and systolic FIR filters, and implement them to have a single structure. The proposed filter design becomes regular and modular because of the recursive adoption of a single structure for convolutions, and is very compact in that it needs only two 1-bit I/O ports in addition to significant improvement on hardware complexity without time penalty on the output sequence.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.4
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• pp.97-102
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• 2007

This paper presents our implemented, synthesized and tested on demand and partial reconfiguration approaches for FIR filters using Xilinx Virtex FPGAs. Our scope is implementation of a low-power, area-efficient autonomously reconfigurable digital signal processing architecture that is tailored for the realization of arbitrary response FIR filters on Xilinx Virtex4 FPGAs. The implementation of design addresses area efficiency and flexibility allowing dynamically inserting and/or removing the partial modules to implement the partial reconfigurable FIR filters with various taps. This partial reconfigurable FIR filter design shows the configuration time improvement, good area efficiency and flexibility by using the dynamic partial reconfiguration method.