• Title/Summary/Keyword: 디지털신호 처리기

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A Study on the Application of Digital Signal Processing for Pattern Recognition of Microdefects (미소결함의 형상인식을 위한 디지털 신호처리 적용에 관한 연구)

  • 홍석주
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.9 no.1
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    • pp.119-127
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    • 2000
  • In this study the classified researches the artificial and natural flaws in welding parts are performed using the pattern recognition technology. For this purpose the signal pattern recognition package including the user defined function was developed and the total procedure including the digital signal processing feature extraction feature selection and classifi-er selection is teated by bulk,. Specially it is composed with and discussed using the statistical classifier such as the linear discriminant function the empirical Bayesian classifier. Also the pattern recognition technology is applied to classifica-tion problem of natural flaw(i.e multiple classification problem-crack lack of penetration lack of fusion porosity and slag inclusion the planar and volumetric flaw classification problem), According to this result it is possible to acquire the recognition rate of 83% above even through it is different a little according to domain extracting the feature and the classifier.

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Development of Small Displacement Sensing System for Linear Motion Guide in Smart Factory (스마트팩토리의 리니어 모션 가이드를 위한 소형 변위 센싱 시스템 개발)

  • Lee, Suk-Yun
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2022.01a
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    • pp.403-405
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    • 2022
  • 본 논문에서는 4차 산업에서 필요로 하는 스마트 기기의 소형 및 저전력 부품에 사용되는 센싱 플랫폼을 제안하였다. 특히 스마트팩토리의 공장 자동화와 정밀 측정의 핵심 부품인 리니어 모션 가이드(LM Guide)를 고정밀, 고정도로 제어할 수 있는 센싱 시스템을 개발하였다. 이를 위하여 기존의 변위 센서 기법의 한계를 극복할 수 있도록 와전류(Eddy Current) 기법을 이용함으로써 LC 공진기와 전도체를 LM 가이드에 장착할 수 있도록 구현하였다. 또한 미세 인덕턴스 값을 측정할 수 있도록 디지털 신호처리 기술과 컴퓨터/산술 기술을 FPGA를 이용한 HW 시스템을 제작하여 구현함으로써 실험을 진행했다. 본 논문에서 구현한 HW 센싱 시스템을 이용하여 LM 가이드를 동작시킴으로 실시간으로 변위 값을 디스플레이 부로 출력되어 측정이 가능하고, 변위 값의 분해능과 응답속도 면에서 우수함을 확인할 수 있다.

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Development of Digital Chirp Pulse Generator for Fine Resolution Image Radar (고해상도 레이더용 광대역 디지털 첩 펄스 발생기 실험모델 개발)

  • 강경인;임종태;신희섭;전재한
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.34 no.8
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    • pp.104-108
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    • 2006
  • There are range and azimuth direction resolution of synthetic aperture radar on the aircraft or satellite. Wide bandwidth chirp pulse generation technology is prerequisite for SAR image with fine resolution. There are two kinds of digital chirp pulse generation technology as arbitrary waveform generator(AWG) and direct digital synthesizer(DDS). In this paper, we design and implement a digital chirp pulse generator to generate 300MHz wide bandwidth linear FM chirp pulse for the fine resolution image with direct digital synthesizer. Implemented chirp pulse generator can be useful for the SAR sensors to make 50cm range resolution image.

Design of High Speed Analog Input Card for Ultrasonic Testing (초음파 탐상을 위한 고속 아날로그 입력 카드의 설계)

  • 이병수;이동원;박두석
    • Journal of the Korea Society of Computer and Information
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    • v.5 no.4
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    • pp.62-68
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    • 2000
  • It was designed a high-speed analog input card that is a important device of ultrasonic testing flaw detector in the middle of non-destructive testing in this Paper. The A/D Board is inquired high-speed sampling rate and fast data acquisition system. This pater shows a design that has a function of Peak- Detection for ultrasonic testing by ISA Bus type and a 50MHz of A/D converter in order to do sampling more than quadruple frequency of transducer frequency.

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A 500MSamples/s 6-Bit CMOS Folding and Interpolating AD Converter (500MSamples/s 6-비트 CMOS 폴딩-인터폴레이팅 아날로그-디지털 변환기)

  • Lee Don-Suep;Kwack Kae-Dal
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.7
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    • pp.1442-1447
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    • 2004
  • In this paper, a 6-Bit CMOS Folding and Interpolating AD Converter is presented. The converter is considered to be useful as an integrated part of a VLSI circuit handling both analog and digital signals as in the case of HDD or LAN applications. A built-in analog circuit for VLSI of a high-speed data communication requires a small chip area, low power consumption, and fast data processing. The proposed folding and interpolating AD Converter uses a very small number of comparators and interpolation resistors, which is achieved by cascading a couple of folders working in different principles. This reduced number of parts is a big advantage for a built-in AD converter design. The design is based on 0.25m double-poly 2 metal n-well CMOS process. In the simulation, with the applied 2.5V and a sampling frequency of 500MHz, the measurements are as follows: power consumption of 27mw, INL and DNL of $\pm$0.1LSB, $\pm$0.15LSB each, SNDR of 42dB with an input signal of 10MHz.

A Study on the Audio Compensation System (음향 보상 시스템에 관한 연구)

  • Jeoung, Byung-Chul;Won, Chung-Sang
    • The Journal of the Acoustical Society of Korea
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    • v.32 no.6
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    • pp.509-517
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    • 2013
  • In this paper, we researched a method that makes a good acoustic-speech system using a digital signal processing technique with dynamic microphone as a transducer. Good acoustic-speech system should deliver the original sound input to electric signal without distortion. By measuring the frequency response of the microphone, adjustment factors are obtained by comparing measured data and standard frequency response of microphone for each frequency band. The final sound levels are obtained using the developed adjustment factors of frequency responses from the microphone and speaker to match the original sound levels using the digital signal processing technique. Then, we minimize the changes in the frequency response and level due to the variation of the distance from source to microphone, where the frequency responses were measured according to the distance changes.

The wideband direct digital frequency synthesizer using the 2-Parallel QD-ROM (2-병렬 QD-ROM 방식을 이용한 광대역 직접 디지털 주파수 합성기)

  • Kim, Chong-Il;Hong, Chan-Ki
    • Journal of the Institute of Convergence Signal Processing
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    • v.12 no.4
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    • pp.291-297
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    • 2011
  • In this paper, the differential quantized method and the parallel method to reduce the size of ROM in the direct digital frequency synthesizer(DDFS) is proposed And we design the DDFS by FPGA The new ROM compression method can reduce the ROM size by using the two ROM. The quantized value of sine is saved by the quantized-ROM(Q-ROM) and the differential ROM(D-ROM). Also we design the phase-to-sine converter using the phase accumulator of parallel type for generating the high frequency. So the total size of the ROM in the proposed DDFS is significantly reduced compared to the original ROM The ROM compression ratio of 67.5% is achieved by this method. Also, the power consumption is decreased according to the ROM size reduction and we can design the DDFS generating the high frequency.

Development of Test Software Program and Digital Signal Processing Board for Array Module Signal Processing System (Array 검출 모듈 신호처리 시스템의 테스트 소프트웨어 프로그램 개발 및 디지털 신호처리 보드 개발)

  • Park, Geo;Kim, Young-kil;Lee, Jean
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.22 no.3
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    • pp.499-505
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    • 2018
  • Shipping and logistics safety, security system is strengthening worldwide, the development of shipping and logistics safety security core technology for national security logistics system construction has been carried out. In addition, it is necessary to localize the Array Detection System, which is a core component of the container search machine, to cope with the 100% pre-inspection of the container scheduled for 2018 in the United States. In this research, we propose a test software program developed by using TI-RTOS (Texas Instruments - Real Time Operating System) with a test digital signal processing board which is developed self development. We have developed a program that can test GPIO, SRAM, TCP/IP, and SDcard using M4 MCU. Also we propose a study on a self-developed Digital Signal Processing Board among the array detection systems that replace foreign products. We have developed a test board that can test M4 MCU and developed an X-Ray Detector Digital Signal Processing Board that combines MCU and FPGA.

Real-Time Respiration and Heartbeat Detector Using a Compact 1.6 GHz Single-Channel Doppler Sensor (소형화된 1.6 GHz 단일 채널 도플러 센서를 이용한 실시간 호흡 및 심장 박동 감지기)

  • Lee, Hyun-Woo;Park, Il-Ho;Kim, Dong-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.4 s.119
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    • pp.379-388
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    • 2007
  • This paper presents a real-time respiration and heartbeat detector comprised of a 1.6 GHz single-channel Doppler sensor and analog/digital signal processing block for remote vital sign detection. The RF front end of the Doppler sensor consists of an oscillator, mixer, low noise amplifier, branch-line hybrid and patch antenna. We apply artificial transmission lines(ATLs) to the branch-line hybrid, which leads to a size reduction of 40 % in the hybrid, while its performance is very comparable to that of a conventional hybrid. The analog signal conditioning block is implemented using second order Sallen-Key active filters and the digital signal processing block is realized with a LabVIEW program on a computer. The respiration and heartbeat detection is demonstrated at a distance of 50 cm using the developed system.

Implementation of Embedded System Based Simulator Controller Using Camera Motion Parameter Extractor (카메라 모션 벡터 추출기를 이용한 임베디드 기반 가상현실 시뮬레이터 제어기의 설계)

  • Lee Hee-Man;Park Sang-Jo
    • The Journal of the Korea Contents Association
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    • v.6 no.4
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    • pp.98-108
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    • 2006
  • In the past, the Image processing system is independently implemented and has a limit in its application to a degree of simple display. The scope of present image processing system is diversely extended in its application owing to the development of image processing IC chips. In this paper, we implement the image processing system operated independently without PC by converting analogue image signals into digital signals. In the proposed image processing system, we extract the motion parameters from analogue image signals and generate the virtual movement to Simulator and operate Simulator by extracting motion parameters.

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