• Title/Summary/Keyword: 델타

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Class-D Digital Audio Amplifier Using 1-bit 4th-order Delta-Sigma Modulation (1-비트 4차 델타-시그마 변조기법을 이용한 D급 디지털 오디오 증폭기)

  • Kang, Kyoung-Sik;Choi, Young-Kil;Roh, Hyung-Dong;Nam, Hyun-Seok;Roh, Jeong-Gin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.3
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    • pp.44-53
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    • 2008
  • In this paper, we present the design of delta-sigma modulation-based class-D amplifier for driving headphones in portable audio applications. The presented class-D amplifier generates PWM(pulse width modulation) signals using a single-bit fourth-order high-performance delta-sigma modulator. To achieve a high SNR(signal-to-noise ratio) and ensure system stability, the locations of the modulator loop filter poles and zeros are optimized and thoroughly simulated. The test chip is fabricated using a standard $0.18{\mu}m$ CMOS process. The active area of the chip is $1.6mm^2$. It operates for the signal bandwidth from 20Hz to 20kHz. The measured THD+N(total harmonic distortion plus noise) at the $32{\Omega}$ load terminal is less than 0.03% from a 3V power supply.

Spur Reduced PLL with △Σ Modulator and Spur Reduction Circuit (델타-시그마 변조기와 스퍼 감소 회로를 사용하여 스퍼 크기를 줄인 위상고정루프)

  • Choi, Young-Shig;Han, Geun-Hyeong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.11 no.5
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    • pp.531-537
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    • 2018
  • A novel PLL with a delta-sigma modulator and a spur reduction circuit is proposed. delta-sigma modulator makes the LF remove noise easily by moving the spur noise to a higher frequency band. Therefore, the magnitude of spur can be reduced the reasonable bandwidth. The spur reduction circuit reduces the spur size by reducing the LF voltage change generated during the period of reference signal. The spur reduction circuit is designed as simple as possible not to increase the size of PLL. The proposed PLL with the previous two techniques is designed with a supply voltage of 1.8V in a 0.18um CMOS process. Simulation results show an almost 20dB reduction in the magnitude of spur. The spur reduced PLL can be used in narrow bandwidth communication system.

깊은준위 과도용량 분광법을 이용하여 양자점 태양전지의 결함상태가 광전변환 효율에 미치는 영향 분석

  • Lee, Gyeong-Su;Lee, Dong-Uk;Mun, Ung-Tak;Kim, Eun-Gyu;Choe, Won-Jun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.08a
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    • pp.225.1-225.1
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    • 2013
  • 지난 수년간 태양전지의 광전변환 효율을 높이기 위해 자가 조립된 InAs 또는 GaSb 와 같은 양자점을 GaAs 단일 p-n 접합에 적용하는 연구를 개발해 왔다. 그러나 양자점의 흡수 단면적에 의한 광흡수도는 양자점층을 수십 층을 쌓으면 증가하지만 활성층에 결함을 생성시킨다. 생성된 결함은 운반자 트랩으로 작용하여 태양전지의 광전변환 효율을 감소시킨다. 본 실험에서는 양자점이 적용된 태양전지와 적용되지 않은 태양전지의 광전변환 효율을 비교하고, 깊은준위 과도용량 분광법을 이용하여 결함상태를 측정하고 및 비교함으로써, 활성층 내부에 생성된 결함이 광전변환 효율에 미치는 영향을 분석하였다. 소자구조는 분자선 증착 방법을 이용하여, 먼저 n-형 GaAs 기판위에 n-형 GaAs를 300 nm 증착한 후, 도핑이 되지 않은 GaAs 활성층을 3.5 ${\mu}m$ 두께로 증착하였다. 마지막으로 p-형 GaAs를 830 nm 증착함으로써 p-i-n구조를 형성하였다. 여기서, n-형 GaAs 과 p-형 GaAs의 도핑농도는 동일하게 $5{\times}1018\;cm^{-3}$ 로 하였다. 또한 양자점 및 델타도핑 층을 각각 태양전지에 적용하기 위해 활성층내에 양자점 20층 및 델타도핑 20층을 각각 형성하였다. 이때, 양자점 태양전지, 델타도핑 태양전지와 양자점이 없는 태양전지의 광전변환 효율은 각각 4.24, 4.97, 3.52%로 나타났다. 태양전지의 전기적 특성을 측정하기 위해 소자구조 위에 Au(300nm)/Pt(30nm)/Ti(30nm)의 전극을 전자빔 증착장치로 증착하였으며, 메사에칭으로 직경 300 ${\mu}m$의 p-i-n 접합 다이오드 구조를 제작하였다. 정전용량-전압 특성 및 깊은준위 과도용량 분광법을 이용하여 태양전지의 결함분석 및 이에 따른 광전변환 효율의 상관관계를 논의할 것이다.

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Intelligent Digital Redesign of Observer-Based Output-Feedback Fuzzy Controller Using Delta Operator (델타 연산자를 이용한 관측기 기반 출력 궤환 퍼지 제어기의 디지털 재설계)

  • Moon, Ji Hyun;Lee, Ho Jae;Kim, Do Wan
    • Journal of the Korean Institute of Intelligent Systems
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    • v.22 no.6
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    • pp.700-705
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    • 2012
  • This paper addresses an intelligent digital redesign (IDR) technique for observer-based output-feedback control systems, in order to efficiently convert a pre-designed Takagi-Sugeno fuzzy model-based analog controller into a sampled-data one in the sense of state matching. A delta operator is used to get an asymptotic relation between the analog and the sampled-data control systems. The IDR problem is viewed as a minimization problem of the norm distances between linear operator to be matched. The condition is represented as linear matrix inequalities, and the separation principle on the IDR is shown.

Spur Reduced PLL with ΔΣ Modulator and Spur Reduction Circuit (델타-시그마 변조기와 스퍼 감소 회로를 사용하여 스퍼 크기를 줄인 위상고정루프)

  • Choi, Young-Shig;Han, Geun-Hyeong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.11 no.6
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    • pp.651-657
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    • 2018
  • A novel PLL with a delta-sigma modulator and a spur reduction circuit is proposed. delta-sigma modulator makes the LF remove noise easily by moving the spur noise to a higher frequency band. Therefore, the magnitude of spur can be reduced the reasonable bandwidth. The spur reduction circuit reduces the spur size by reducing the LF voltage change generated during the period of reference signal. The spur reduction circuit is designed as simple as possible not to increase the size of PLL. The proposed PLL with the previous two techniques is designed with a supply voltage of 1.8V in a 0.18um CMOS process. Simulation results show an almost 20dB reduction in the magnitude of spur. The spur reduced PLL can be used in narrow bandwidth communication system.

Performance comparison of various deep neural network architectures using Merlin toolkit for a Korean TTS system (Merlin 툴킷을 이용한 한국어 TTS 시스템의 심층 신경망 구조 성능 비교)

  • Hong, Junyoung;Kwon, Chulhong
    • Phonetics and Speech Sciences
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    • v.11 no.2
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    • pp.57-64
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    • 2019
  • In this paper, we construct a Korean text-to-speech system using the Merlin toolkit which is an open source system for speech synthesis. In the text-to-speech system, the HMM-based statistical parametric speech synthesis method is widely used, but it is known that the quality of synthesized speech is degraded due to limitations of the acoustic modeling scheme that includes context factors. In this paper, we propose an acoustic modeling architecture that uses deep neural network technique, which shows excellent performance in various fields. Fully connected deep feedforward neural network (DNN), recurrent neural network (RNN), gated recurrent unit (GRU), long short-term memory (LSTM), bidirectional LSTM (BLSTM) are included in the architecture. Experimental results have shown that the performance is improved by including sequence modeling in the architecture, and the architecture with LSTM or BLSTM shows the best performance. It has been also found that inclusion of delta and delta-delta components in the acoustic feature parameters is advantageous for performance improvement.

Development of Thermostat for the Fluxgate Magnetometer in Icheon Geomagnetic Observatory and Stability Evaluation after Installation (이천 지자기 관측소 플럭스게이트 자력계 온도 조절 장치 개발 및 설치 후 안정성 자체 평가 )

  • Dooyoung, Choi;Seunguk, Lee;Joonsung, Kim;Dae-Young, Lee;Kyu-Cheol, Choi;Junghee, Cho
    • Journal of Space Technology and Applications
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    • v.2 no.3
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    • pp.221-229
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    • 2022
  • This paper reports on the design and installation of a thermostat to keep the temperature of the fluxgate magnetometer constant and the data stability evaluation after installation. The thermostat was installed at the Icheon Geomagnetic Observatory operated by the Korean Space Weather Center of National Radio Research Agency. It was designed in consideration of stability of temperature control against safety incident, potential effects on magnetic field measurement, and the temperature control efficiency. After the temperature control device was installed, it was confirmed that the temperature was constantly maintained at the level of 20℃. Delta F and baseline values were used to evaluate geomagnetic data stability, and it was confirmed that delta F and baseline fluctuations were reduced after installation of the thermostat.

Rainfall estimation and evaluation for a small-scale rainfall radar in Busan Eco-Delta Smart city (부산 에코델타 스마트시티 소형 강우레이더 강우추정 및 평가)

  • Wan Sik Yu;Kyoung Pil Kim;Shin Uk Kang;Seong Sim Yoon
    • Proceedings of the Korea Water Resources Association Conference
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    • 2023.05a
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    • pp.277-277
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    • 2023
  • 최근 기후변화의 영향으로 호우의 발생빈도가 증가하고 있는 추세이며, 도시지역의 호우는 돌발적이고 국지적인 특성을 가지고 있어 인명과 재산피해 역시 증가하고 있으며, 급격한 도시화로 인한 구조적으로 홍수에 취약한 실정이다. 국지성 도시호우는 저층(1 km 내외)에서 형성되는 강우가 지배적이며, 기존의 대형레이더는 높은 산 정상에 설치되어 1.5 km 이상의 강우관측을 중심으로 운영됨에 따라 저층강우의 탐지 및 변동성 관측에 취약하여, 이에 대형 레이더에서 뿐만 아니라 도시단위의 국지성 호우관측에 대응할 수 있는 소형 레이더 기반 고정밀 강우관측 마련 및 운영 기술이 필요하다. 현재 K-water는 부산 에코델타 스마트시티에 도시 물재해 플랫폼 구현의 일환으로 돌발강우사전 탐지 및 도시의 신속·정확한 강우 관측을 위하여 높은 시공간 해상도를 제공하는 이중편파X 밴드 소형 강우레이더를 설치하고, 효율적 운용을 위해 각 고도각에서의 빔 차폐율을 확인하고 이를 고려한 최적 관측전략을 수립하였다. 또한 Z-Phi 방법을 이용한 반사도 감쇠 보정 기술을 개발하였으며, 강우 추정을 위해 하이브리드 고도면 합성 기법(HSR) 기법을 적용하고 검증하였다. 이후 소형 레이더의 정량적 추정강수를 이용하여 강우예측 정보를 생산하기 위해 이류모델을 적용하고, 비슬산과 소형 합성 레이더 추정강수로 선행 10분에서 180분까지 예측할 수 있도록 개발하였다. 또한, 지상강우관측 자료와의 정확도 비교 평가를 수행하고, 행정구역 및 표준유역의 예측 평균강우량을 생산하여 부산 에코델타 스마트시티 도시 물재해 통합관리 시스템과 연계운영을 위한 후속 과업을 수행중에 있다.

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A Design of a Reconfigurable 4th Order ΣΔ Modulator Using Two Op-amps (2개의 증폭기를 이용한 가변 구조 형의 4차 델타 시그마 변조기)

  • Yang, Su-Hun;Choi, Jeong-Hoon;Yoon, Kwang Sub
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.5
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    • pp.51-57
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    • 2015
  • In this paper, in order to design the A / D converter with a high resolution of 14 bits or more for the biological signal processing, CMOS delta sigma modulator that is a 1.8V power supply voltage - were designed. we propose a new structure of The fourth order delta-sigma modulator that needs four op amps but we use only two op amps. By using a time -interleaving technique, we can re-construct the circuit and reuse the op amps. Also, we proposed a KT/C noise reduction circuit to reduce the thermal noise from a noisy resistor. We adjust the size of sampling capacitor between sampling time and integrating time, so we can reduce almost a half of KT/C noise. The measurement results of the chip is fabricated using a Magna 0.18um CMOS n-well1 poly 6 metal process. Power consumption is $828{\mu}W$ from a 1.8V supply voltage. The peak SNDR is measured as a 75.7dB and 81.3dB of DR at 1kHz input frequency and 256kHz sampling frequency. Measurement results show that KT/C noise reduction circuit enhance the 3dB of SNDR. FOM of the circuit is calculated to be 142dB and 41pJ / step.

A Study on Smart Eco-city and Ubiquitous Administrative Spatial Informatization : In terms of Water Pollution and Disaster Prevention of Busan Ecodeltacity (스마트생태도시와 유비쿼터스 행정공간정보화연구 -부산 에코델타시티 수질오염 재난방재 측면에서-)

  • Lee, Sang-Yun;Yoon, Hong-Joo
    • The Journal of the Korea institute of electronic communication sciences
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    • v.11 no.9
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    • pp.827-840
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    • 2016
  • In recent years, our society, because of the arrival of a new paradigm according to the rapid changes in ICT has entered into future smart society and the ubiquitous era. So it can be a notable turning point in the city disaster prevention system with big data, aspects of the era change. Therefore, this study was to derive a desirable vision for the big data city disaster prevention informatization in terms of ICT city disaster prevention system development as preparedness for the city disaster by applying 'scenario planning' as a foresight method. Soon this study derived a successful city disaster prevention informatization strategy as preparedness for the city disaster, for example, in terms of water pollution and disaster prevention of Busan Ecodeltacity. It proposed the big data city disaster prevention informatization system with the use of the administrative aspects of information with spatial informatization as big data information. Also this study explored the future leadership strategy of the big data city disaster prevention informatization in smart society and smart eco-city. Eventually in 2030 to around, in order to still remain our city disaster prevention informatization as a leading ICT nation, this study suggested the following strategy. It is important to ready the advanced ubiquitous administrative spatial informatization and ICT disaster prevention system with big data in terms of water pollution and disaster prevention of Busan Ecodeltacity.