• KIPS Transactions on Computer and Communication Systems
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• v.3 no.5
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• pp.129-140
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• 2014

BIST(Built-in self test) is to detect various faults of the existing memory and BIRA(Built-in redundancy analysis) is to repair detected faults by allotting spare. Also, BISR(Built-in self repair) which integrates BIST with BIRA, can enhance the whole memory's yield. However, the previous methods were suggested for RAM and are difficult to diagnose disturbance that is NAND-type flash memory's intrinsic fault when used for the NAND-type flash memory with different characteristics from RAM's memory structure. Therefore, this paper suggests a BISD(Built-in self diagnosis) to detect disturbance occurring in the NAND-type flash memory and to diagnose the location of fault, and BISR to repair faulty blocks.

• Journal of the Korea Society of Computer and Information
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• v.6 no.1
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• pp.7-13
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• 2001

As the density of VLSI increases, the conventional logic testing is not sufficient to completely detect the new faults generated in design and fabrication processing. Recently. IDDQ testing becomes very attractive since it can overcome the limitations of logic testing. This paper presents a new BIC for the internal current test in CMOS logic circuit. Our circuit is composed of Magnetoresistive current sensor, level shifter, comparator, reference voltage circuit and a circuit be IDDQ tested as a kind of self-testing fashion by using the proposed BIC.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.2134-2135
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• 2011

전력 설비의 지중화 증가로 인하여 지중 설비에서의 사고 위험성도 증가하고 있다. 본 논문에서는 누전 고장점이 있는 저압 지중접속함(핸드홀)이 침수시 고장점에서 유출되는 누설 전류에 의한 수중 전위를 검출하여 위험을 경보하는 장치를 제작하고, 실제 환경과 유사한 실험장에서 실험하였다. 실험을 통하여 제작한 핸드홀 누전감시장치가 정상 동작함을 확인하였다. 또한 고장점이 존재하지 않거나 전원 공급이 없는 핸드홀의 경우에도 침수시 수중에서 상용주파수 노이즈 전위가 측정됨을 확인하였고, 이런 노이즈 제거 기술에 대한 연구가 추가적으로 필요함을 확인하였다. 침수시 누전 고장점은 평상시에 검출하기 어렵기 때문에 핸드홀 누전 감시 장치의 개발은 사고를 예방함과 동시에 사고를 검출하여 지중선로의 사후 유지 보수에 도움이 될 수 있을 것으로 예상한다.

• Journal of the Korea Society of Computer and Information
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• v.3 no.2
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• pp.99-104
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• 1998

In this paper I designed test pattern generator which will be completely detected the faults of multi-stage Logic Circuit. 1 generated this pattern using the test pattern generation Logic Circuit. The generated test patterns compared with the exhausted testing was decreased pattern. This test pattern generator will detect the all single stuck-at faults in the multi-stage Logic Circuit. The choice of which of the many I.C testing methods to use can have a effect on the success or failure of the fault detected. One of the most important considerations is cost and designed test pattern generator is very low cost type.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.11
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• pp.69-77
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• 2004

An efficient board-level interconnect test algorithm is proposed considering both the ground bounce effect and the delay fault detection. The proposed algorithm is capable of IEEE 1149.1 interconnect test, negative ground bounce effect prevention, and also detects delay faults as well. The number of final test pattern set is not much different with the previous method, even our method enables to detect the delay faults in addition to the abilities the previous method guarantees.

• Proceedings of the Korean Information Science Society Conference
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• 1998.10c
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• pp.671-673
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• 1998

본 논문에서는 CMOS 2단 연산 증폭기에 존재하는 강고장을 검출하기 위한 새로운 아날로그 테스트 방법을 제안한다. 테스트 대상 회로는 테스트를 용이하도록 궤환 루프를 삽입하고 정현파 테스트 입력을 인가하여 출력단에 고장 효과를 발생시켜 고장을 검출하는 테스트 방법이다. 테스트 대상회로에 고장이 존재할 경우 출력 단에서 정현파가 아닌 DC 전압이나 왜곡 신호가 나타나 고장 검출이 용이하다. 제안된 테스트 방법은 테스트 입력 신호를 생성하기 위한 복잡한 알고리즘을 요구하지 않으므로 테스트 패턴 시간이 짧고, 비용이 절감된다. 또한 테스트를 위한 추가적인 하드웨어의 오브헤드가 적다. 본 논문에서 제안된 테스트 방법의 정당성과 효율성은 HSPICE 모의실험을 통하여 검증하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.2
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• pp.145-153
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• 2001

As combinational ATPG algorithms achieve effectively 100% fault coverage, reducing the length of test set without loosing its fault coverage becomes a challenging work. The new approach is based on the independent and the compatible relationships between faults. For more compact test set, the size of compatible fault set must be maximized, thus this algorithm generates fault-pattern pairs, and a fault-pattern pair tree structure using the independent and the compatible relationships between faults. With the fault-pattern pair tree structure, a compact test set effectively generated. The experimental results for ISCAS 85 and 89 benchmark circuits demonstrate the effectiveness of the proposed method.

• Journal of the Korean Magnetics Society
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• v.6 no.5
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• pp.287-293
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• 1996

The squirrel cage rotors of induction motors may have several faults such as broken bars, bad spots in end ring and abnormal skew caused by improper processing. These faults may cause bad effects on the performance of the induction motor. This paper proposes the detecting technique of these faults by analyzing the induced current of the detecting electric magnet, using 2-D finite element method taking account of the rotor movement.

• Journal of the Korean Institute of Intelligent Systems
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• v.9 no.5
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• pp.538-544
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• 1999

In this paper, we propose a new fault detection algorithm for transmission line protection using ANFIS(Adaptive Network Fuzzy Inference System). The developed system consists of two subsystems: fault type classification, and fault location estimation. We use rms value, zero sequence component and positive sequence of current, and then using learning method of neural network, premise and consequent parameters are tuned properly. To prove the performance of the proposcd system, generated data by EMTP(Electr0- Magnetic Transient Program) sin~ulationi s used. It is shown that the proposed relaying classifies fault types accurately and advances fault location estimation.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.2088-2089
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• 2007

본 논문은 직렬 아크고장 신호분석과 관련된 연구로서, 정상상태와 아크고장 상태에서 발생하는 전압 전류를 검출하여 아크고장 전류의 특이점을 분석하였다. 역률이 1인 저항성 부하와 L성 부하, C성 부하를 구성하고, 순시 임피던스 분석, FFT 분석, 웨이블렛 분석 방법을 사용하였다. 분석결과 순시 임피던스 분석방법과 FFT 분석방법에서는 직렬 아크고장 신호의 특이점을 찾을 수 있었으나 정량화하기가 어렵고, 웨이블렛 분석방법으로는 직렬 아크고장 신호의 특이점 검출 및 정량화 가능성을 발견할 수 있었다.