• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.13 no.5
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• pp.209-220
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• 2013

Handover is the technology to minimize data lose of mobile devices and make continuous communication possible even if the device could be moved from one digital cell site to another one. That is, it is a function that enables the mobile user to avoid the disconnection of phone conversations when moving from a specific mobile communication area to another. Today, there are a lot of ongoing researches for fast and efficient hand-over, in order to address phone call's delay and disconnection which are believed to be the mobile network's biggest problems, and these should essentially be resolved in all mobile networks. Thanks to recent technology development in mobile network, the LTE network has been commercialized today and it has finally opened a new era that makes it possible for mobile phones to process data at high speed. In LTE network environment, however, a new authentication key must be generated for the hand-over. In this case, there can be a problem that the authentication process conducted by the hand-over incurs its authentication cost and delay time. This essay suggests an efficient key caching hand-over method which simplifies the authentication process: when UE makes hand-over from oMME to nMME, the oMME keeps the authentication key for a period of time, and if it returns to the previous MME within the key's lifetime, the saved key can be re-used.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.10
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• pp.1845-1852
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• 2008

The key elements of inter prediction are motion estimation(ME) and motion compensation(MC). Motion estimation is to find the optimum motion vectors, not only by using a distance criteria like the SAD, but also by taking into account the resulting number of 비트s in the 비트 stream. Motion compensation is compensate for movement of blocks of current frame. Inter-prediction Encoding is always the main bottleneck in high-quality streaming applications. Therefore, in real-time streaming applications, dedicated hardware for executing Inter-prediction is required. In this paper, we studied a motion estimator(ME) for H.264/AVC. The designed motion estimator is based on 2-D systolic array and it connects processing elements for fast SAD(Sum of Absolute Difference) calculation in parallel. By providing different path for the upper and lower lesion of each reference data and adjusting the input sequence, consecutive calculation for motion estimation is executed without pipeline stall. With data reuse technique, it reduces memory access, and there is no extra delay for finding optimal partitions and motion vectors. The motion estimator supports variable-block size and takes 328 cycles for macro-block calculation. The proposed architecture is local memory-free different from paper [6] using local memory. This motion estimation encoder can be applicable to real-time video processing.

• Journal of the Computational Structural Engineering Institute of Korea
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• v.33 no.3
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• pp.171-178
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• 2020

In this study, we develop MPI-OpenMP hybrid parallelization for multibody peridynamic simulations. Peridynamics is suitable for analyzing complicated dynamic fractures and various discontinuities. However, compared with a conventional finite element method, nonlocal interactions in peridynamics cost more time and memory. In multibody peridynamic analysis, the costs increase due to the additional interactions that occur when computing the nonlocal contact and ghost interlayer models between adjacent bodies. The costs become excessive when further refinement and smaller time steps are required in cases of high-velocity impact fracturing or similar instances. Thus, high computational efficiency and performance can be achieved by parallelization and optimization of multibody peridynamic simulations. The analytical code is developed using an Intel Fortran MPI compiler and OpenMP in NURION of the KISTI HPC center and parallelized through MPI-OpenMP hybrid parallelization. Further parallelization is conducted by hybridizing with OpenMP threads in each MPI process. We also try to minimize communication operations by model-based decomposition of MPI processes. The numerical results for the impact fracturing of multiple bodies show that the computing performance improves significantly with MPI-OpenMP hybrid parallelization.

• KIPS Transactions on Computer and Communication Systems
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• v.6 no.11
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• pp.437-444
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• 2017

Electric Pole is a supporting beam used for power transmission/distribution which is sensitive to external force change of environmental factors. Therefore, power facilities have many difficulties in terms of maintenance/conservation from external environmental changes and natural disasters that cause a great economic impact. The aerial wire cause elasticity due to the influence of temperature, or factors such as wind speed and wind direction, that weakens the electric pole. The situation may lead to many safety risk in day-to-day life. But, the safety assessment of the pole is carried out at the design stage, and aftermath is not considered. For the safety and maintenance purposes, it is very important to analyze the influence of weather factors on external forces periodically. In this paper, we analyze the acceleration data of the sensor nodes installed in electric pole for maintenance/safety purpose and use Kalman filter as noise compensation method. Fast Fourier Transform (FFT) is performed to analyze the influence of each meteorological factor, along with the meteorological factors on frequency components. The result of the analysis shows that the temperature, humidity, solar radiation, hour of daylight, air pressure, wind direction and wind speed were influential factors. In this paper, the influences of meteorological factors on frequency components are different, and it is thought that it can be an important factor in achieving the purpose of safety and maintenance.

• Analytical Science and Technology
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• v.24 no.6
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• pp.510-518
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• 2011

Recent developments and improvements of multiple technological elements including mass spectrometry (MS) instrument, multi-dimensional chromatographic separation, and software tools processing MS data resulted in benefits of large scale proteomics analysis. However, its throughput is limited by the speed and reproducibility of the protein digestion process. In this study, we demonstrated a new method for rapid proteolytic digestion of proteins using acoustic technology. Tryptic digests of BSA prepared at various conditions by super acoustic for optimization time and intensity were analyzed by LC-MS/MS showed higher sequence coverage in compared with traditional 16 hrs digestion method. The method was applied successfully for complex proteins of a breast cancer cells at 30 min of digestion at intensity 2. This new application reduces time-consuming of sample preparation with better efficiency, even with large amount of proteins, and increases high-throughput process in sample preparation state.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.1
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• pp.51-58
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• 2007

This paper presented an adaptive pipeline architecture for a high-performance and low-power asynchronous processor. The proposed pipeline architecture employed a stage-skipping and a stage-combining scheme. The stage-skipping scheme can skip the operation of a bubble stage that is not used pipeline stage in an instruction execution. In the stage-combining scheme, two consecutive stages can be joined to form one stage if the latter stage is empty. The proposed pipeline architecture could reduce the processing time and power consumption. The proposed architecture supports multi-processing in the EX stage that executes parallel 4 instructions. We designed an asynchronous microprocessor to estimate the efficiency of the proposed pipeline architecture that was synthesized to a gate level design using a $0.35-{\mu}m$ CMOS standard cell library. We evaluated the performance of the target processor using SPEC2000 benchmark programs. The proposed architecture showed about 2.3 times higher speed than the asynchronous counterpart, AMULET3i. As a result, the proposed pipeline schemes and architecture can be used for asynchronous high-speed processor design

• The Journal of the Acoustical Society of Korea
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• v.21 no.5
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• pp.430-437
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• 2002

Having a variety of good characteristics against other pattern recognition techniques, the multilayer perceptron (MLP) has been widely used in speech recognition and speaker recognition. But, it is known that the error backpropagation (EBP) algorithm that MLP uses in learning has the defect that requires restricts long learning time, and it restricts severely the applications like speaker recognition and speaker adaptation requiring real time processing. Because the learning data for pattern recognition contain high redundancy, in order to increase the learning speed it is very effective to use the online-based learning methods, which update the weight vector of the MLP by the pattern. A typical online EBP algorithm applies the fixed learning rate for each update of the weight vector. Though a large amount of speedup with the online EBP can be obtained by choosing the appropriate fixed rate, firing the rate leads to the problem that the algorithm cannot respond effectively to different learning phases as the phases change and the number of patterns contributing to learning decreases. To solve this problem, this paper proposes a Changing rate and Omitting patterns in Instant Learning (COIL) method to apply the variable rate and the only patterns necessary to the learning phase when the phases come to change. In this paper, experimentations are conducted for speaker verification and speech recognition, and results are presented to verify the performance of the COIL.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.1
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• pp.152-164
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• 2015

A rapid development of semiconductors, sensors and mobile network technologies has enable that the embedded device includes high sensitivity sensors, wireless communication modules and a video processing module for vehicular environment, and many researchers have been actively studying the smart car technology combined on the high performance embedded devices. The vehicle is increased as the development of society, and the risk of accidents is increasing gradually. Thus, the advanced driver assistance system providing the vehicular status and the surrounding environment of the vehicle to the driver using various sensor data is actively studied. In this paper, we design and implement the smart vehicular camera device providing the V2X communication and gathering environment information. And we studied the method to create the metadata from a received video data and sensor data using video analysis algorithm. In addition, we invent S-ROI, D-ROI methods that set a region of interest in a video frame to improve calculation performance. We performed the performance evaluation for two ROI methods. As the result, we confirmed the video processing speed that S-ROI is 3.0 times and D-ROI is 4.8 times better than a full frame analysis.

• The KIPS Transactions:PartC
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• v.13C no.4 s.107
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• pp.471-480
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• 2006

Recently, multimedia communication services, such as video conferencing and voice over IP, have been rapidly spread. H.323 is an international standard that specifies the components, protocols and procedures that provide multimedia communication services of real-time audio, video, and data communications over packet networks, including IP based networks. H.323 is applied to many commercial services because it supports various network environments and has a good performance. But communication services based on H.323 may have some problem because of current network trouble or mis-implementation of H.323. The understanding of this problem is a critical issue because it improves the quality of service and is easy to service maintenance. In this paper, we implement the analysis system for H.323 protocol wihch includes H.245, H.225.0, RTP, RTCP, and so on. Tills system is able to capture, parse, and present the H.323 protocol in real-time. Through the operation test and performance evaluation, we prove that our system is a useful to analyze and understand the problems for communication services based on H.323.

• The KIPS Transactions:PartA
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• v.10A no.3
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• pp.247-254
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• 2003

This paper describes a Delay Locked Loop (DLL) with low supply voltage and wide lock range for Synchronous DRAM which employs Double Data Rate (DDR) technique for faster data transmission. To obtain high resolution and fast lock-on time, a new type of phase detector is designed. The new counter and lock indicator structure are suggested based on the Dual-clock dual-data Flip Flop (DCDD FF). The DCDD FF reduces the size of counter and lock indicator by about 70%. The delay line is composed of coarse and fine units. By the use of fast phase detector, the coarse delay line can detect minute phase difference of 0.2 nsec and below. Aided further by the new type of 3-step vernier fine delay line, this DLL circuit achieves unprecedented timing resolution of 25psec. This DLL spans wide locking range from 500MHz to 500MHz and generates high-speed clocks with fast lock-on time of less than 5 clocks. When designed using 0.25 um CMOS technology with 1.8V supply voltage, the circuit consumes 32mA at 500MHz locked condition. This circuit can be also used for other applications as well, such as synchronization of high frequency communication systems.