• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.157-158
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• 2007

Effects of post-metallization anneal (PMA) on interface trap characteristics of Si-$SiO_2$ are studied. The conventional PMA method utilizes forming gas anneal, where 10% hydrogen in nitrogen atmosphere is used. A new PMA method utilizes hydrogen rich PECVD- silicon nitride $(SiN_x)$ film as a hydrogen diffusion source and a out-diffusion blocking layer. It can be shown through charge pumping current measurement that the new PMA is indeed effective to decrease Si-$SiO_2$ interface trap density.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.139-140
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• 2008

최근 누설전류를 줄이기 위해서 게이트 산화막에 대한 연구가 활발히 진행되고 있다. 게이트 산화막에 유전상수가 큰 high-k 물질을 적용시킴으로서 누설 전류를 줄일 수 있어 특성의 향상을 가져다 줄 수 있다. 본 연구에서는 여러 high-k 물질중 $CeO_2$를 블로킹 산화막에 적용시켰다. $CeO_2$는 높은 유전상수를 가지고 있고 실리콘과 화학적으로 안정한 물질이어서 좋은 특성을 기대할 수 있다. 본 연구에서는 Al/$CeO_2/SiN_x/SiO_xN_y$/Si 의 MINOS 구조를 만들고 $CeO_2$ 두께변화에 따른 MINOS 구조의 전기적인 특성을 측정하였다. 그 결과 $CeO_2$의 박막 두께가 40nm 일 때 더 좋은 특성이 나타난다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.2
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• pp.117-123
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• 2004

A 30 nm $In_{0.7}GaAs$ High Electron Mobility Transistor (HEMT) with triple-gate has been successfully fabricated using the $SiO_2/SiN_x$ sidewall process and BCB planarization. The sidewall gate process was used to obtain finer lines, and the width of the initial line could be lessened to half by this process. To fill the Schottky metal effectively to a narrow gate line after applying the developed sidewall process, the sputtered tungsten (W) metal was utilized instead of conventional e-beam evaporated metal. To reduce the parasitic capacitance through dielectric layers and the gate metal resistance ($R_g$), the etchedback BCB with a low dielectric constant was used as the supporting layer of a wide gate head, which also offered extremely low Rg of 1.7 Ohm for a total gate width ($W_g$) of 2x100m. The fabricated 30nm $In_{0.7}GaAs$ HEMTs showed $V_{th}$of -0.4V, $G_{m,max}$ of 1.7S/mm, and $f_T$ of 421GHz. These results indicate that InGaAs nano-HEMT with excellent device performance could be successfully fabricated through a reproducible and damage-free sidewall process without the aid of state-of-the-art lithography equipment. We also believe that the developed process will be directly applicable to the fabrication of deep sub-50nm InGaAs HEMTs if the initial line length can be reduced to below 50nm order.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.13 no.5
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• pp.254-259
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• 2003

In the fabrication process of transparent conducting thin films of the ATO (antimony-doped tin oxide) on a soda lime glass substrate by a sol-gel dip coating method, the effects of the $SiO_2$ buffer layer formed on the substrate and $N_2$ annealing treatment were investigated by XPS (X-ray photoelectron spectroscopy) analysis. Optical transmittance and electrical resistivity of the 400 nm-thick ATO thin films which were deposited on $SiO_2$ buffer layer/soda lime glass and then annealed under nitrogen atmosphere were 84 % and $5.0\times 10^{-3}\Omega \textrm{cm}$ respectively. The XPS analysis confirmed that a $SiO_2$ buffer layer inhibited Na ion diffusion from the substrate, resulting in prohibiting the formation of a secondary phase such as $Na_2SnO_3$ and SnO and increasing Sb ion concentration and ratio of $Sb^{5+}/Sb^{3+}$ in the film. And it was also found that $N_2$ annealing treatment leads to the reduction of $Sn^{4+}$as well as $Sb^{5+}$ however the reduction of $Sn^{4+}$ is more effective and therefore consequently results in decrease in the electrical resistivity to produce an excellent electrical properties of the film.

• Journal of the Korean Vacuum Society
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• v.2 no.2
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• pp.181-187
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• 1993

We have studied the anodic oxidation of silicon in the anisotropic etchant of EPW(Ethylenediamine, Pyrocatechol and Water) solution using the cyclic polarization technique. The samples have been characterized by means of X-ray photoelectron spectroscopy(XPS) and secondary ion mass spectrometry (SIMS). The results of cyclic polarization experiments show that the anodic oxides formed on p- and n-type silicon wafers break down at the same potential while breakdown does not occur up to open circuit potential in the case of $p^+$-Si. Strong etch-resistance of $p^+$-XPS. SIMS depth profiles suggest that the critical concentration of boron for etch-stop to occur appears to be much higher than what is widely believed.

• Journal of the Korean institute of surface engineering
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• v.51 no.3
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• pp.185-190
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• 2018

Dopant-free silicon heterojunction solar cells using Transition Metal Oxide(TMO) such as Molybdenum Oxide($MoO_X$) and Vanadium Oxide($V_2O_X$) have been focused on to increase the work function of TMO in order to maximize the work function difference between TMO and n-Si for a high-efficiency solar cell. One another way to increase the work function difference is to control the silicon wafer resistivity. In this paper, dopant-free silicon heterojunction solar cells were fabricated using the wafer with the various resistivity and analyzed to understand the effect of n-Si work function. As a result, it is shown that the high passivation and junction quality when $V_2O_X$ deposited on the wafer with low work function compared to the high work function wafer, inducing the increase of higher collection probability, especially at long wavelength region. the solar cell efficiency of 15.28% was measured in low work function wafer, which is 34% higher value than the high work function solar cells.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.8
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• pp.618-621
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• 2001

Plate-type $\beta$-FeSi$_2$single crystals were grown using FeSi$_2$, Fe, and Si as starting materials by the chemical transport reaction method. The $\beta$-FeSi$_2$single crystal was an orthorhombic structure. The direct optical energy gap was found to be 0.87eV at 300K. Hall effect shows a n-type conductivity in the $\beta$-FeSi$_2$ single crystal. The electrical resistivity values was 1.608Ωcm and electron mobility was 3x10$^{-1}$ $\textrm{cm}^2$/V.sec at room temperature.

• Journal of the Optical Society of Korea
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• v.5 no.1
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• pp.1-4
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• 2001

The results of investigating $SiL_{2,3}$/ X-ray emission valence spectra of amorphous silicon films irradiated by excimer laser are presented. It is found that laser annealing leads to crystallization of amorphous silicon films and the crystallinity increases with the laser energy density from 250 to 400 mJ/$\textrm{cm}^2$. The vertical structure of the film is investigated by changing the accelerating voltage on the X-ray tube, and the chemical and structural state of Si$_3$N$_4$ buffer layer is found not to be changed by the excimer laser treatment.

• Korean Journal of Materials Research
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• v.22 no.4
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• pp.202-206
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• 2012

$CoSi_2$ was formed through annealing of atomic layer deposition Co thin films. Co ALD was carried out using bis(N,N'-diisopropylacetamidinato) cobalt ($Co(iPr-AMD)_2$) as a precursor and $NH_3$ as a reactant; this reaction produced a highly conformal Co film with low resistivity ($50\;{\mu}{\Omega}cm$). To prevent oxygen contamination, $ex-situ$ sputtered Ti and $in-situ$ ALD Ru were used as capping layers, and the silicide formation prepared by rapid thermal annealing (RTA) was used for comparison. Ru ALD was carried out with (Dimethylcyclopendienyl)(Ethylcyclopentadienyl) Ruthenium ((DMPD)(EtCp)Ru) and $O_2$ as a precursor and reactant, respectively; the resulting material has good conformality of as much as 90% in structure of high aspect ratio. X-ray diffraction showed that $CoSi_2$ was in a poly-crystalline state and formed at over $800^{\circ}C$ of annealing temperature for both cases. To investigate the as-deposited and annealed sample with each capping layer, high resolution scanning transmission electron microscopy (STEM) was employed with electron energy loss spectroscopy (EELS). After annealing, in the case of the Ti capping layer, $CoSi_2$ about 40 nm thick was formed while the $SiO_x$ interlayer, which is the native oxide, became thinner due to oxygen scavenging property of Ti. Although Si diffusion toward the outside occurred in the Ru capping layer case, and the Ru layer was not as good as the sputtered Ti layer, in terms of the lack of scavenging oxygen, the Ru layer prepared by the ALD process, with high conformality, acted as a capping layer, resulting in the prevention of oxidation and the formation of $CoSi_2$.

• ETRI Journal
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• v.35 no.3
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• pp.425-430
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• 2013

In this paper, we propose a triple-gate trench power MOSFET (TGRMOS) that is made through a modified RESURF stepped oxide (RSO) process, that is, the nitride_RSO process. The electrical characteristics of TGRMOSs, such as the blocking voltage ($BV_{DS}$) and on-state current ($I_{D,MAX}$), are strongly dependent on the gate configuration and its bias condition. In the nitride_RSO process, the thick single insulation layer ($SiO_2$) of a conventional RSO power MOSFET is changed to a multilayered insulator ($SiO_2/SiN_x/TEOS$). The inserted $SiN_x$ layer can create the selective etching of the TEOS layer between the gate oxide and poly-Si layers. After additional oxidation and the poly-Si filling processes, the gates are automatically separated into three parts. Moreover, to confirm the variation in the electrical properties of TGRMOSs, such as $BV_{DS}$ and $I_{D,MAX}$, simulation studies are performed on the function of the gate configurations and their bias conditions. $BV_{DS}$ and $I_{D,MAX}$ are controlled from 87 V to 152 V and from 0.14 mA to 0.24 mA at a 15-V gate voltage. This $I_{D,MAX}$ variation indicates the specific on-resistance modulation.