• 제목/요약/키워드: window memory

검색결과 238건 처리시간 0.03초

이중초점 렌즈를 이용한 Fractal-space 다중화 (Fractal-space Multiplexing using A Double-Focusing tens)

  • Kim, Soo-Gil;Hong, Sun-Ki
    • 한국산학기술학회:학술대회논문집
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    • 한국산학기술학회 2001년도 춘계학술대회 발표논문집
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    • pp.277-280
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    • 2001
  • We proposed a novel fractal-space multiplexing holographic memory system using moving window and double-focusing lens, which can eliminate crosstalk due to two neighboring moving window rows in the vertical direction of the conventional moving window holographic memory system, and demonstrated its feasibility through optical experiments.

High Quality Vertical Silicon Channel by Laser-Induced Epitaxial Growth for Nanoscale Memory Integration

  • Son, Yong-Hoon;Baik, Seung Jae;Kang, Myounggon;Hwang, Kihyun;Yoon, Euijoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권2호
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    • pp.169-174
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    • 2014
  • As a versatile processing method for nanoscale memory integration, laser-induced epitaxial growth is proposed for the fabrication of vertical Si channel (VSC) transistor. The fabricated VSC transistor with 80 nm gate length and 130 nm pillar diameter exhibited field effect mobility of $300cm^2/Vs$, which guarantees "device quality". In addition, we have shown that this VSC transistor provides memory operations with a memory window of 700 mV, and moreover, the memory window further increases by employing charge trap dielectrics in our VSC transistor. Our proposed processing method and device structure would provide a promising route for the further scaling of state-of-the-art memory technology.

푸싱 방식에 의한 윈도우 입력 버퍼 스위치의 성능 향상 에 관한 연구 (Window input buffer switch performance progressing by pushing police)

  • 양승헌;조용권;곽재영;이문기
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(1)
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    • pp.123-126
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    • 2000
  • In this paper, we are proposed to pushing window input buffer A.T.M Switch that is not use memory read and write of general window police. Pushing window switch is superior to general window switch in performance but is large to general window switch in cross point number. Max throughput and Cell occupying probability results are verified by analysis an simulation. The evaluation of performance is max throughput and cell loss probability and mean queue length.

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Design & Implementation of Enhanced Groupware Messenger

  • Park, HyungSoo;Kim, HoonKi;Na, WooJong
    • 한국컴퓨터정보학회논문지
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    • 제23권4호
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    • pp.81-88
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    • 2018
  • In this paper, we present some problems with the Groupware Messenger functionality based on dot net 2.0 and implement a new design structure to solve them. They include memory leakage, slow processing, and client window memory crash. These problems resulted in the inconvenience of using instant messaging and the inefficient handling of office tasks. Therefore, in this paper, instant messaging functionality is implemented according to a new design architecture. The new system upgrades dot net 4.5 for clients and deploys the new features based on MQTT for the messenger server. We verify that the memory leak problem and client window memory crash issues have been eliminated on the system with the new messenger functionality. We measure the amount of time it takes to bind data to a set of messages and evaluate the performance, compared to a given system. Through this comparative evaluation, we can see that the new system is more reliable and performing.

프랙탈-공간 다중화를 이용한 홀로그래픽 메모리 시스템의 누화해석 (Crosstalk Analysis of Holographic Memory System using Fractal - Space Multiplexing)

  • 김수길;홍선기
    • 조명전기설비학회논문지
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    • 제18권1호
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    • pp.44-51
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    • 2004
  • 움직이는 창(moving window; MW)을 이용한 프랙탈-공간 다중화 방법은 액정디스플레이(liquid crystal display; LCD) 상에서 수평, 수직방향으로 움직이는 창들을 통과한 기준빔으로 홀로그램을 다중화하는 방법이다. 그러나, 수직방향으로 인접한 MW사이에서 누화가 발생하여 고밀도의 정보저장 및 복원이 제한되고 있다. 따라서, 본 논문에서는 고밀도의 정보저장을 위해 렌즈의 초점거리, MW의 간격, 다중화되는 홀로그램의 개수에 의한 누화를 이론적으로 분석하고, 체적형 광굴절결정과 디스크형 광폴리머를 이용한 프랙탈-공간 다중화 실험 결과를 제시하였다.

Pt/BLT/$CeO_2$/Si 구조를 이용한 MFIS의 특성 (Characteristics of MFIS using Pt/BLT/$CeO_2$/Si structures)

  • 이정미;김창일;김경태;김동표;황진호;이철인
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 추계학술대회 논문집 Vol.15
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    • pp.186-189
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    • 2002
  • The MFIS capacitors were fabricated using a metalorganic decomposition method. Thin layers of $CeO_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X-ray diffraction was used to determine the phase of the BLT thin films and the quality of the $CeO_2$ layer. The morphology of films and the interface structures of the BLT and the $CeO_2$ layers were investigated by scanning electron microscopy. The width of the memory window in the C-V curves for the MFIS structure is 4.78 V. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

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$ZrO_2$$CeO_2$ 절연체를 이용한 BLT/절연체/Si 구조의 특성 (Characterization of BLT/insulator/Si structure using $ZrO_2$ and $CeO_2$ insulator)

  • 이정미;김경태;김창일
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2003년도 춘계학술대회 논문집 센서 박막재료 반도체 세라믹
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    • pp.186-189
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    • 2003
  • The MFIS capacitors were fabricated using a metalorganic decomposition method. Thin layers of $ZrO_2$ and $CeO_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X -ray diffraction was used to determine the phase of the BLT thin films and the quality of the $ZrO_2$ and $CeO_2$ layer. AES show no interdiffusion and the formation of amorphous $SiO_2$ layer is suppressed by using the $ZrO_2$ and $CeO_2$ film as buffer layer between the BLT film and Si substrate. The width of the memory window in the C-V curves for the $BLT/ZrO_2/Si$ and $BLT/CeO_2/Si$ structure is 2.94 V and 1.3V, respectively. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

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BLT 박막을 이용한 MFIS 구조에서 MgO buffer layer의 영향 (Effect of the MgO buffer layer for MFIS structure using the BLT thin film)

  • 이정미;김경태;김창일
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2003년도 추계학술대회 논문집 Vol.16
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    • pp.23-26
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    • 2003
  • The BLT thin film and MgO buffer layer were fabricated using a metalorganic decomposition method and the DC sputtering technique. The MgO thin film was deposited as a buffer layer on $SiO_2/Si$ and BLT thin films were used as a ferroelectric layer. The electrical of the MFIS structure were investigated by varying the MgO layer thickness. TEM showsno interdiffusion and reaction that suppressed by using the MgO film as abuffer layer. The width of the memory window in the C-Y curves for the MFIS structure decreased with increasing thickness of the MgO layer Leakage current density decreased by about three orders of magnitude after using MgO buffer layer. The results show that the BLT and MgO-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

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임베디드 X-시스템 개발 (Development of Embedded X-System)

  • 정갑중
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2008년도 춘계종합학술대회 A
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    • pp.641-644
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    • 2008
  • 본 논문은 지능형 임베디드 시스템의 GUI 구현에 관한 논문이다. 지능형 임베디드 시스템의 GUI 구현을 위해 사용된 X 윈도우 시스템과 그래픽 라이브러리의 구조 및 동작에 대해 논하고 지능형 임베디드 시스템의 X-시스템에 필요한 기능 및 구성 요소에 대해 조사 및 분석을 통한 리눅스 커널과의 동작 및 기능 검증 구현을 보인다. 저성능 및 저전력이며 고용량 메모리를 탑재한 임베디드 시스템의 하나인 지능형 임베디드 X-시스템에서 적용 가능하도록 요구되는 기능과 동작을 구현하고 소형 운영체제를 위한 GUI 개발에 적용 가능하다. 이러한 소형 운영체제 및 이를 위한 X-시스템은 지능형 개인정보서비스를 위한 임베디드 플랫폼 시스템으로써 개인용 정보의 지능형 서비스 기능을 지원하고 새로운 소형 운영체제를 탑재한 시스템의 개발에 적용 가능하다. 본 논문에서는 이러한 지능형 임베디드 X-시스템과 응용 소프트웨어 및 서비스 개발을 위한 GUI환경 구현에 대하여 기술한다.

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Increasing P/E Speed and Memory Window by Using Si-rich SiOx for Charge Storage Layer to Apply for Non-volatile Memory Devices

  • 김태용;;김지웅;이준신
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.254.2-254.2
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    • 2014
  • The Transmission Fourier Transform Infrared spectroscopy (FTIR) of SiOx charge storage layer with the richest silicon content showed an assignment at peaks around 2000~2300 cm-1. It indicated that the existence of many silicon phases and defect sources in the matrix of the SiOx films. The total hysteresis width is the sum of the flat band voltage shift (${\Delta}VFB$) due to electron and hole charging. At the range voltage sweep of ${\pm}15V$, the ${\Delta}VFB$ values increase of 0.57 V, 1.71 V, and 13.56 V with 1/2, 2/1, and 6/1 samples, respectively. When we increase the gas ratio of SiH4/N2O, a lot of defects appeared in charge storage layer, more electrons and holes are charged and the memory window also increases. The best retention are obtained at sample with the ratio SiH4/N2O=6/1 with 82.31% (3.49V) after 103s and 70.75% after 10 years. The high charge storage in 6/1 device could arise from the large amount of silicon phases and defect sources in the storage material with SiOx material. Therefore, in the programming/erasing (P/E) process, the Si-rich SiOx charge-trapping layer with SiH4/N2O gas flow ratio=6/1 easily grasps electrons and holds them, and hence, increases the P/E speed and the memory window. This is very useful for a trapping layer, especially in the low-voltage operation of non-volatile memory devices.

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