• Journal of the Microelectronics and Packaging Society
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• v.10 no.2
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• pp.7-12
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• 2003

The $Bi_{3.3}La_{0.7}O_{12}$(BLT) capacitors with Metal-Ferroelectric-Insulator-Silicon structure were prepared on $SiO_2/Si$ substrates by using sol-gel method. The BLT thin films annealed at $650^{\circ}C$ and $700^{\circ}C$ showed randomly oriented perovskite crystalline structures. The full with at half maximum (FWHM) of the (117) main peak was decreased from $0.65^{\circ}$ to $0.53^{\circ}$ with increasing the annealing temperature from $650^{\circ}C$ to $700^{\circ}C$, indicating the improvement in the crystalline quality of the film. In addition, the grain size and $R_rms$ , values were increased with increasing the annealing temperatures, showing the rough film surface at higher annealing temperatures. From the capacitance-voltage (C-V) measurements, the memory window voltage of the BLT film annealed at $700^{\circ}C$ was found to be about 0.7 V at an applied voltage of 5 V. The leakage current density of the BLT film annealed at $700^{\circ}C$ was about $3.1{\times}10^{-8}A/cm^2$.

• Journal of the Korean Ceramic Society
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• v.40 no.1
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• pp.52-61
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• 2003

$SrBi_2Ta_2O_9(SBT)$and$ZrO_2$thin films for MFIS structure(Metal-Ferroelectric-Insulator-Semiconductor) were deposited by RF magnetron sputtering method. In order to investigate the effect of heat treatment of insulator layers and MFIS structure, the insulator layers were heat treated from $550^{circ}C;to; 850^{\circ}C$in conventional furnace or RTA furnace under$O_2$and Ar ambient, respectively. After then, C-V characteristics and leakage current were measured. The capacitor with 20 nm thick $ZrO_2$layer treated at RTA$750^{circ}C;in;O_2$ atmosphere had the largest memory window. The C-V and leakage current characteristics of the$Pt/SBT(260nm)/ZrO_2(20nm)/Si$structure were better than those of$Pt/SBT(260nm)/Si$ structure. These results showed that$ZrO_2$films took a role of buffer layer effectively.

• Korean Journal of Materials Research
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• v.10 no.12
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• pp.807-811
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• 2000

CeO$_2$ and SrBi$_2$Ta$_2$O$_{9}$ (SBT) thin films for MFISFET (Metal-ferroelectric-insulator-semiconductor-field effect transistor) were deposited by r.f. sputtering and pulsed laser ablation method, respectively. The effects of sputtering gas ratio(Ar:O$_2$) during deposition for CeO$_2$ films were investigated. The CeO$_2$ thin films deposited on Si(100) substrate at $600^{\circ}C$ exhibited (200) preferred orientation. The preferred orientation, Brain size and surface roughness of films decreased with increasing oxygen to argon gas ratio. The films deposited under the condition of Ar:O$_2$= 1 : 1 showed the best C- V characteristics. The leakage current of films showed the order of 10$^{-7}$ ~10$^{-8}$ A at 100kV/cm. The SBT thin films on CeO$_2$/Si substrate showed dense microstructure of polycrystalline phase. From the C-V characteristics of MFIS structure with SBT film annealed at 80$0^{\circ}C$, the memory window width was 0.9V at 5V The leakage current density of Pt/SBT/CeO$_2$/Si structure annealed at 80$0^{\circ}C$ was 4$\times$10$^{-7}$ /$\textrm{cm}^2$ at 5V.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.3
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• pp.663-669
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• 2014

The electrical characteristics of RRAM with different annealing temperature and thickness have been measured and discussed. The devices with Pt/Ti top electrode of 150nm, Pt bottom electrode of 150nm, $HfO_2$ oxide thickness of 45nm and 70nm have been fabricated. The fabricated device were classified by 3 different kinds according to the annealing temperature, such as non-annealed, annealed at $500^{\circ}C$ and annealed at $850^{\circ}C$. The set and reset voltages and the variation of resistance with temperatures have been measured as electrical properties. From the measurement, it was found that the set voltages were decreased and the reset voltage were increased slightly, and thus the sensing window was decreased with increasing of measurement temperatures. It was remarkable that the device annealed at $850^{\circ}C$ showed the best performances. Although the device with thickness of 45nm showed better performances in the point of the sensing window, the resistance of 45nm devices was large relatively in the low resistive state. It can be expected to enhance the device performances with ultra thin RRAM if the defect generation could be reduced at the $HfO_2$ deposition process.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.5
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• pp.73-78
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• 2009

We researched economic efficiency and possibility of game portal service based PDA/Smart phone by popularize of next generation portable internet WiBro. PDA/Smart phone are difficult to equal level content service with PC, because of it has low CPU and memory than PC. This paper are implemented paper of integrated server of Cable or Wireless for WiBro contents. In this research, we implemented and show test result of CP killer contents in PDA. It can apply to WiBro portable internet and has required many functions in integrated server for cable or wireless. CP Killer contents for WiBro portable internet is developed by PC server base on Window XP. It can accept next generation wireless LAN, portable internet and ubiquitous issues. We expect activation of commercial use that WiBro contents and server trading.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.5
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• pp.365-369
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• 2009

Overlapping windows are generally used for queries to process continuous data streams. Nevertheless, existing approaches discussed join algorithms only for basic types of windows such as tumbling windows and tuple-driven windows. In this paper, we propose an efficient join algorithm for overlapping windows, which are considered as a more general type of windows. The proposed algorithm is based on an incremental window join. It focuses on producing join results continuously when the memory overflow frequently occurs. It consists of (1) a method to use both of the incremental and full joins selectively, (2) a victim selection algorithm to minimize latency of join processing and (3) an idle time professing algorithm. We show through our experiments that the selective use of incremental and full joins provides better performance than using one of them only.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.2
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• pp.103-113
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• 2001

This paper described a design and implementation of a single-chip encoder/decoder using the LZSS algorithm and entropy coding in 0.6${\mu}{\textrm}{m}$ CMOS technology. Dictionary storage for the dictionary search processor(DISP) used a 2K$\times$8bit on-chip memory with 50MHz clock speed. It performs compression on byte-oriented input data at a data rate of one byte per clock cycle except when one out of every 33 cycles is used to update the string window of dictionary. In result, the average compression ratio is 46% by applied entropy coding of the LZSS codeword output. This is to improved on the compression performance of 7% much more then LZSS.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.12A
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• pp.1876-1882
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• 1999

In this paper, we have proposed a FCB detection algorithm for the GSM system which is european cellular standard. The detection algorithm can be implemented using received signal sampler, correlator, and post detection combiner. GSM mobile phone can use the proposed algorithm for detection of the Broadcasting Channel, and to obtain the initial timing estimate. The proposed algorithm has a architecture which is suitable for DSP or ASIC implementation, and required memory size is small. The performance of the algorithm is a function of the processing data window size and the threshold values. Proper window size and the threshold values can be determined by analyzing the correlator and combiner. The proposed algorithm has been implemented using DSP, and the performance was verified using baseband simulation. The simulation assumed frequency offset values of 0ppm and 15ppm with the receiver filter bandwidth set at both minimum and maximum. It is shown that the algorithm is robust under various assumptions, and suitable for real implementations.

• Sleep Medicine and Psychophysiology
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• v.6 no.2
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• pp.149-157
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• 1999

A Computerzed Neuropsychological Test(CNT) system using multimedia and object oriented technologies are developed for clinical application in psychiatry. The developed system is composed of 14 neuropsychologial tests which are capable of evaluation of various cognitive functions and functional localization of brain. The system employs Microsoft Window based graphic user interface for easy operation and it has a touch screen and a mouse as input devices from the patient. Speech perception test, color word test, verbal memory test, contingent continuos performance test, and trail making test were translated into korean language, so that usefulness of tests was maximized. Through the results of utilization of this system in the cases of patients with head trauma and psychiatric desorder, this system can be proved to be useful in the evaluation of cognitive function and functional localization of brain.

• Journal of the Korea Computer Industry Society
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• v.3 no.3
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• pp.321-330
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• 2002

A 2-D median filter has many applications in various image and video signal processing areas. The rapid development in VLSI technology makes it possible to implement a real-time or near real-time 2-D median filter with reasonable cost. For the efficient VLSI implementation, the algorithm should have characteristics such as small memory requirements, regular computations, and local data transfers. This paper presents an architecture of the real-time two-dimensional separable median filter which has appropriate characteristics for the VLSI implementation. For the efficient two-dimensional median filter, a separable two-dimensional median filtering structure and a bit-sliced pipelined median searching algorithm are used. A behavioral simulator is implemented with C language and used for the analysis of the presented architecture.