• Journal of Sensor Science and Technology
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• v.8 no.6
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• pp.481-486
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• 1999

Alumina electrostatic chucks for silicon wafer process with wide range of electrical resistivity were fabricated by controlling the amount of $TiO_2$ addition(0, 1.3, 2.0, 2.8 wt%). The dependence of electrostatic force on applied voltage, temperature and humidity was investigated. In addition, response characteristics on applied voltage and relationship between electrical resistivity and electrostatic force characteristics such as Coulomb force and Johnsen-Rahbeck force were discussed.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.6
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• pp.271-277
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• 2002

In this paper, a MEMS silicon package is newly designed, fabricated for HMIC, and characterized for microwave and millimeter-wave device applications. The proposed package is fabricated by using two high resistivity silicon substrates and surface/bulk micromachining technology. It has a good performance characteristic such as -20㏈ of $S_11$/ and -0.3㏈ of $S_21$ up to 20㎓, which is useful in microwave region. It has also better heat transfer characteristics than the commonly used ceramic package. Since the proposed silicon MEMS package is easy to fabricate and wafer level chip scale packaging is also possible, the production cost can be much lower than the ceramic package. Since it will be a promising low-cost package for mobile/wireless applications.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.11
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• pp.99-104
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• 1993

We analyzed the D.I. water used in wet cleaning process of semiconductor device manufacturing both at the D.I. water plant and at the wafer cleaning bath to detect the impurity source of D.I. water contamination. This shows that the quantity of impurity is related to the resistivity of D.I. water, and we found that the cleanliness of the wafer surface processed in D.I. water bath was affected by the degree of the ionic impurity contamination. So we evaluated the cleaning effect as different method for Fe ion, having the best adsoptivity on wafer surface. Moreover the temperature effect of the D.I. water is investigated in case of anion in order to remove the chemical residue after wet process. In addition to the control of D.I. water resistivity, chemical analysis of impurity control in D.I. water should be included and a suitable cleaning an drinsing method needs to be investigated for a high yielding semiconductor device.

• Electrical & Electronic Materials
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• v.9 no.9
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• pp.911-917
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• 1996

Platinum thin films were deposited on Si-wafer by DC rnagnetron sputtering for RTD (resistance thermometer devices). We investigated the physical and electrical characteristics of these films under various conditions, the input power, working vacuum, temperature of substrate and also after annealing these films. The deposition rate was increased with increasing the input power but decreased with increasing Ar gas pressure. The resistivity and sheet resistivity were decreased with increasing the temperature of substrate and the annealing time at 1000.deg. C. At substrate temperature of >$300^{\circ}C$, input power of 7 w/cm$^{2}$, working vacuum of 5 mtorr and annealing conditions of 1000.deg. C and 240 min, we obtained 10.65.mu..ohm..cm, resistivity of Pt thin films and 3800-3900 ppm/.deg. C, TCR(temperature coefficient of resistance). These values are close to the bulk value. These results indicate that the Pt thin films deposited by DC magnetron sputtering have potentiality for the development of Pt RTD temperature sensor.

• Journal of the Korean Ceramic Society
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• v.42 no.7 s.278
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• pp.455-460
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• 2005

Deposition of TiN$_{x}$ film was conducted with a DC sputtering technique. The effect of the processing parameters such as substrate temperature, deposition time, working pressure, bias power, and volumetric flowing rate ratio of Ar to N$_{2}$ gas on the resistivity of TiN$_{x}$ film was systematically investigated. Three kinds of substrates, soda-lime glass, (100) Si wafer, and 111m thermally grown (111) SiO$_{2}$ wafer were used to explore the effect of substrate. The phase of TiN$_{x}$ film was analyzed by XRD peak pattern and deposition rate was determined by measuring the thickness of TiNx film through SEM cross-sectional view. Resistance was obtained by 4 point probe method as a function of processing parameters and types of substrates. Finally, optimum condition for synthesizing TiN$_{x}$ film having lowest resistivity was discussed.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.4
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• pp.208-211
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• 2018

This paper details the design of a 1,200 V class trench gate field stop IGBT (insulated gate bipolar transistor) with a nano gate structure smaller than 1 um. Decreasing the size is important for lowering the cost and increasing the efficiency of power devices because they are high-voltage switching devices, unlike memory devices. Therefore, in this paper, we used a 2-D device and process simulations to maintain a gate width of less than 1 um, and carried out experiments to determine design and process parameters to optimize the core electrical characteristics, such as breakdown voltage and on-state voltage drop. As a result of these experiments, we obtained a wafer resistivity of $45{\Omega}{\cdot}cm$, a drift layer depth of more than 180 um, an N+ buffer resistivity of 0.08, and an N+ buffer thickness of 0.5 um, which are important for maintaining 1,200 V class IGBTs. Specially, it is more important to optimize the resistivity of the wafer than the depth of the drift layer to maintain a high breakdown voltage for these devices.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.10
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• pp.451-457
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• 2003

The silicon wafer is stable status at room temperature, but it is weak at high temperatures which is necessary for it to be fabricated into a power semiconductor device. During thermal diffusion processing, a high temperature produces a variety thermal stress to the wafer, resulting in device failure mode which can cause unwanted oxide charge or some defect. This disrupts the silicon crystal structure and permanently degrades the electrical and physical characteristics of the wafer. In this paper, the electrical characteristics of a single oxide layer due to high temperature diffusion process, wafer resistivity and thickness of polyback was researched. The oxide quality was examined through capacitance-voltage characteristics, defect density and BMD(Bulk Micro Defect) density. It will describe the capacitance-voltage characteristics of the single oxide layer by semiconductor process and device simulation.

• The Korean Journal of Ceramics
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• v.3 no.1
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• pp.18-20
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• 1997

The fabrication process of silicon-diamond(SOD) structure wafer were studied. Microwave plasma chemical vapor deposition (MWPCVD) and annealing technology were used to synthesize diamond film with high resistivity and thermal conductivity. Bonding and etchback silicon-on-diamond (BESOD) were utilized to form supporting substrate and single silicon thin layer of SOD wafer. At last, a SOD structure wafer with 0.3~1$\mu\textrm{m}$ silicon film and 2$\mu\textrm{m}$ diamond film was prepared. The characteristics of radiation for a CMOS integrated circuit (IC) fabricated by SOD wafer were studied.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.38-38
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• 2009

Wafer thickness of crystalline silicon is an important factor which decides a price of solar cell. PC1D was used to fix a condition that is required to get a high efficiency in a crystalline silicon solar cell using thin wafer($150{\mu}m$). In this simulation, base resistivity and emitter doping concentration were used as variables. As a result of the simulation, $V_{oc}$=0.6338(V), $I_{sc}$=5.565(A), $P_{max}$=2.674(W), FF=0.76 and efficiency 17.516(%) were obtained when emitter doping concentration is $5{\times}10^{20}cm^{-3}$, depth factor is 0.04 and sheet resistance is $79.76{\Omega}/square$.

• Journal of the Korean institute of surface engineering
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• v.44 no.6
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• pp.264-268
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• 2011

The Molybedenium thin film is generally used on back contact material of CIGS solar cell due to low electrical resistivity and stable thermal expansion coefficient. The Mo thin films deposited on si wafer by the magnetron sputtering method. The research focused on the variation of electrical resistivity of films which deposited with various working pressure at the target power of 2.0 kW(8.4 W/). The lowest resistivity of Mo thin film showed $9.0{\mu}O$-cm at pressure of 1.5 mTorr. However, working pressure increasing up to 50 mTorr, resistivities were highly increased. The results showed that the conductivity of Mo films depended on growing structures and defects in deposition process. Surface morphology, porosity, grain size, oxidation, and bonding structures were analysed by SEM, AFM, spectroscopic ellipsometry (SE), XRD, and XPS.