• Journal of Power Electronics
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• v.14 no.3
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• pp.478-487
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• 2014

This study presents a new interleaved three-level zero-voltage switching (ZVS) converter for high-voltage and high-current applications. Two circuit cells are operated with interleaved pulse-width modulation in the proposed converter to reduce the current ripple at the input and output sides, as well as to decrease the current rating of output inductors for high-load-current applications. Each circuit cell includes one half-bridge converter and one three-level converter at the primary side. At the secondary side, the transformer windings of two converters are connected in series to reduce the size of the output inductor or switching current in the output capacitor. Based on the three-level circuit topology, the voltage stress of power switches is clamped at $V_{in}/2$. Thus, MOSFETs with 500 V voltage rating can be used at 800 V input voltage converters. The output capacitance of the power switch and the leakage inductance (or external inductance) are resonant at the transition interval. Therefore, power switches can be turned on under ZVS. Finally, experiments verify the effectiveness of the proposed converter.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.02a
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• pp.43-46
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• 2003

The dc reactor type high-Tc superconducting fault current limiter(SFCL) is composed of three parts, a power converter, a magnetic core reactor(MCR) and a dc reactor. This study concerned with the power converter of the DC reactor type high-Tc SFCL. The rectifying devices which power converter of 6.6kV/200A SFCL consists of have to endure high voltage. We propose the dual mode power converter to reduce the voltage which each rectifying device endures. In the single phase the experiment and simulation of dual mode power converter and the simulation of power converter with one bridge rectifier are performed. The current of each system with different power converter has a same tendency and the voltage which rectifying device of dual mode power converter endures is reduced in half by comparison with that of power converter with one bridge rectifier. We found dual mode power converter can be applied to SFCL.

• Journal of Power Electronics
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• v.12 no.4
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• pp.643-653
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• 2012

An interleaved DC/DC converter with series-connected transformers is presented to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two half-bridge converter cells connected in series to reduce the voltage stress of the switches at one-half of the input voltage. The output sides of the two converter cells with interleaved pulse-width modulation are connected in parallel to reduce the ripple current at the output capacitor and to achieve load current sharing. Therefore, the size of the output chokes and the capacitor can be reduced. The output capacitances of the MOSFETs and the resonant inductances are resonant at the transition instant to achieve ZVS turn-on. In addition, the switching losses on the power switches are reduced. Finally, experiments on a laboratory prototype (24V/40A) are provided to demonstrate the performance of the proposed converter.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.376-378
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• 1996

This paper presents a new PFC control method which replaces a fast line current measurement with a filtered load current measurement. Using the power balance relation between the input and the output of the boost converter. the input current can be described as the function of load current. Thus the PWM signal which effects the switching control of the boost converter is generated using the PFC input voltage, the PFC output voltage and the load current as input variables. By using a filter between the bridge rectifier and a dc-to-dc converter, the input voltage of the dc-to-dc converter is forced to always maintain above zero volt. Then the input current traces a sinewave in phase. The proposed scheme accomplishes a very high power factor and a low harmonic distortion of the line current. The validity of this scheme is demonstrated through simulation.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.1
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• pp.66-69
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• 2019

This study proposes a high-efficiency phase-shifted full-bridge (PSFB) converter with a wide input voltage range. The conventional PSFB converter is a useful topology in high-power applications. This converter not only achieves the zero-voltage switching of the primary switches, but also has small RMS current in the primary side. However, because the conventional PSFB converter has large freewheeling current in the primary side when it is designed considering the hold-up time of the converter, such a converter has high conduction loss at the primary switches. To solve this problem, a new PSFB converter is proposed in this study. The experiment is implemented with an input voltage ranging from a 320 V-400 V and an output power specification of 715 W.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.2
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• pp.301-307
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• 2009

In the paralleled converter module with peak current mode control, current imbalance appears when the voltage controllers with integral control of converter module are not exactly identical. In this paper, the voltage controller is designed to equal the current command of each converter module using the current command bus. The current balance controller is also proposed to balance the average currents of converter modules with imbalaced inductance. It is designed to have good transient response. Proposed method is implemented with the paralleled 2-module and 4-module boost converters with imbalanced inductance. Experimental results verify the performance of current share during both steady and transient states of converter.

• Journal of Power Electronics
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• v.17 no.1
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• pp.41-55
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• 2017

This study proposes a novel zero voltage transition (ZVT) pulse width modulation (PWM) DC-DC interleaved boost converter with an active snubber cell. All the semiconductor devices in the converter turn on and off with soft switching to reduce the switching power losses and improve the overall efficiency. Through the interleaved approach, the current stresses of the main devices and the ripple of the output voltage and input current are reduced. The main switches turn on with ZVT and turn off with zero voltage switching (ZVS). The auxiliary switch turns on with zero current switching (ZCS) and turns off with ZVS. In addition, the snubber cell does not create additional current or voltage stress on the main switches and main diodes. The proposed converter can smoothly achieve soft switching characteristics even under light load conditions. The theoretical analysis and operating stages of the proposed converter are made for the D > 50% and D < 50% modes. Finally, a prototype of the proposed converter is implemented, and the experimental results are given in detail for 500 W and 50 kHz. The overall efficiency of the proposed converter reached 95.5% at nominal output power.

• The Transactions of the Korean Institute of Power Electronics
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• v.1 no.1
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• pp.38-46
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• 1996

The commutation operation of the current source converter for switched reluctance motor drives is analyzed in this paper. The commutation operation in the current source converter consists of two modes. At turn-off of phase switch, the phase current decreases sinusoidally, and the sum of two phase currents during commutation period is constant. At this time, the capacitor voltage increases quickly with changing polarity and decreases slowly when another phase switches turn on or off. Frequency of step-down DC chopper in the current source converter is low because of the dump such as BJTs and GTOs are possible as phase switches instead of Power MOSFET and IGBTS. They may result in reductions of conduction losses and manufacturing cost in the current source converter comparing to the voltage source converter of SRM.

• Journal of Power Electronics
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• v.7 no.4
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• pp.310-317
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• 2007

In this paper, an analysis and hysteretic controller design of a $3^{rd}$ order buck converter is presented. The proposed hysteretic controller consists of an inner current-loop, just like the conventional cascade control scheme, and an outer voltage-loop for load voltage regulation. Although it is possible to include an inner current loop from different branches of the converter, from the feasibility and operational point of view, the load side capacitor current would be the better choice. The addition of an inner current-loop improves the dynamic performance of the converter while preserving the robustness of the hysteretic control. The controller formulation and closed-loop converter performance analysis are validated through computer simulations. Few experimental results of the proposed converter are given and compared with the buck converter.

• Journal of Power Electronics
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• v.15 no.2
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• pp.389-398
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• 2015

This paper presents a 1.92 kW resonant converter for medium voltage applications that uses low voltage stress MOSFETs (500V) to achieve zero voltage switching (ZVS) turn-on. In the proposed converter, four MOSFETs are connected in series to limit the voltage stress of the power switches at half of the input voltage. In addition, three resonant circuits are adopted to share the load current and to reduce the current stress of the passive components. Furthermore, the transformer primary and secondary windings are connected in series to balance the output diode currents for medium power applications. Split capacitors are adopted in each resonant circuit to reduce the current stress of the resonant capacitors. Two balance capacitors are also used to automatically balance the input capacitor voltage in every switching cycle. Based on the circuit characteristics of the resonant converter, the MOSFETs are turned on under ZVS. If the switching frequency is less than the series resonant frequency, the rectifier diodes can be turned off under zero current switching (ZCS). Experimental results from a prototype with a 750-800 V input and a 48V/40A output are provided to verify the theoretical analysis and the effectiveness of the proposed converter.