• 제목/요약/키워드: voltage-mode driver

검색결과 77건 처리시간 0.024초

Sliding Mode Current Controller Design for Power LEDs

  • Kim, Eung-Seok;Kim, Cherl-Jin
    • Journal of Electrical Engineering and Technology
    • /
    • 제6권1호
    • /
    • pp.104-110
    • /
    • 2011
  • High-brightness LED control is required for stable operation, thus the driver and control system must be designed to deliver a constant current to optimize reliability and ensure consistent luminous flux. In this paper, the sliding mode current controller is designed to adjust the illumination density of power LEDs. The controller design model of power LEDs, including its driving circuit, is proposed to realize the dimming control of power LEDs. A buck converter is introduced to drive the power LEDs and reduce the input voltage to a lower level. The sliding mode software controller is implemented to adjust the dimming of power LEDs. The proposed strategy for driving power LEDs is investigated and comparatively studied by experiments.

A Level Dependent Source Concoction Multilevel Inverter Topology with a Reduced Number of Power Switches

  • Edwin Jose, S.;Titus, S.
    • Journal of Power Electronics
    • /
    • 제16권4호
    • /
    • pp.1316-1323
    • /
    • 2016
  • Multilevel inverters (MLIs) have been preferred over conventional two-level inverters due to their inherent properties such as reduced harmonic distortion, lower electromagnetic interference, minimal common mode voltage, ability to synthesize medium/high voltage from low voltage sources, etc. On the other hand, they suffer from an increased number of switching devices, complex gate pulse generation, etc. This paper develops an ingenious symmetrical MLI topology, which consumes lesser component count. The proposed level dependent sources concoction multilevel inverter (LDSCMLI) is basically a multilevel dc link MLI (MLDCMLI), which first synthesizes a stepped dc link voltage using a sources concoction module and then realizes the ac waveform through a conventional H-bridge. Seven level and eleven level versions of the proposed topology are simulated in MATLAB r2010b and prototypes are constructed to validate the performance. The proposed topology requires lesser components compared to recent component reduced MLI topologies and the classical topologies. In addition, it requires fewer carrier signals and gate driver circuits.

A Wide Output Range, High Power Efficiency Reconfigurable Charge Pump in 0.18 mm BCD process

  • Park, Hyung-Gu;Jang, Jeong-A;Cho, Sung Hun;Lee, Juri;Kim, Sang-Yun;Tiwari, Honey Durga;Pu, Young Gun;Hwang, Keum Cheol;Yang, Youngoo;Lee, Kang-Yoon;Seo, Munkyo
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • 제14권6호
    • /
    • pp.777-788
    • /
    • 2014
  • This paper presents a wide output range, high power efficiency reconfigurable charge pump for driving touch panels with the high resistances. The charge pump is composed of 4-stages and its configuration automatically changes based on the required output voltage level. In order to keep the power efficiency over the wide output voltage range, internal blocks are automatically activated or deactivated by the clock driver in the reconfigurable charge pump minimizing the switching power loss due to the On and Off operations of MOSFET. In addition, the leakage current paths in each mode are blocked to compensate for the variation of power efficiency with respect to the wide output voltage range. This chip is fabricated using $0.18{\mu}m$ BCD process with high power MOSFET options, and the die area is $1870{\mu}m{\times}1430{\mu}m$. The power consumption of the charge pump itself is 79.13 mW when the output power is 415.45 mW at the high voltage mode, while it is 20.097 mW when the output power is 89.903 mW at the low voltage mode. The measured maximum power efficiency is 84.01 %, when the output voltage is from 7.43 V to 12.23 V.

Design of a TRIAC Dimmable LED Driver Chip with a Wide Tuning Range and Two-Stage Uniform Dimming

  • Chang, Changyuan;Li, Zhen;Li, Yuanye;Hong, Chao
    • Journal of Power Electronics
    • /
    • 제18권2호
    • /
    • pp.640-650
    • /
    • 2018
  • A TRIAC dimmable LED driver with a wide tuning range and a two-stage uniform dimming scheme is proposed in this paper. To solve the restricted dimming range problem caused by the limited conduction ratio of TRIAC dimmers, a conduction ratio compensation technique is introduced, which can increase the output current up to the rated output current when the TRIAC dimmer turns to the maximum conduction ratio. For further optimization, a two-stage uniform dimming diagram with a rapid dimming curve and a slow dimming curve is designed to make the LED driver regulated visually uniform in the whole adjustable range of the TRIAC dimmer. The proposed control chip is fabricated in a TSMC $0.35{\mu}m$ 5V/650V CMOS/LDMOS process, and verified on a 21V/500mA circuit prototype. The test results show that, in the 90V/60Hz~132V/60Hz ac input range, the voltage linear regulation is 2.6%, the power factor is 99.5% and the efficiency is 83%. Moreover, in the dimming mode, the dimming rate is less than 1% when the maximum dimming current is 516mA and the minimum dimming current is only about 5mA.

Design and Implementation of PIC/FLC plus SMC for Positive Output Elementary Super Lift Luo Converter working in Discontinuous Conduction Mode

  • Muthukaruppasamy, S.;Abudhahir, A.;Saravanan, A. Gnana;Gnanavadivel, J.;Duraipandy, P.
    • Journal of Electrical Engineering and Technology
    • /
    • 제13권5호
    • /
    • pp.1886-1900
    • /
    • 2018
  • This paper proposes a confronting feedback control structure and controllers for positive output elementary super lift Luo converters (POESLLCs) working in discontinuous conduction mode (DCM). The POESLLC offers the merits like high voltage transfer gain, good efficiency, and minimized coil current and capacitor voltage ripples. The POESLLC working in DCM holds the value of not having right half pole zero (RHPZ) in their control to output transfer function unlike continuous conduction mode (CCM). Also the DCM bestows superlative dynamic response, eliminates the reverse recovery troubles of diode and retains the stability. The proposed control structure involves two controllers respectively to control the voltage (outer) loop and the current (inner) loop to confront the time-varying ON/OFF characteristics of variable structured systems (VSSs) like POESLLC. This study involves two different combination of feedback controllers viz. the proportional integral controller (PIC) plus sliding mode controller (SMC) and the fuzzy logic controller (FLC) plus SMC. The state space averaging modeling of POESLLC in DCM is reviewed first, then design of PIC, FLC and SMC are detailed. The performance of developed controller combinations is studied at different working states of the POESLLC system by MATLAB-Simulink implementation. Further the experimental corroboration is done through implementation of the developed controllers in PIC 16F877A processor. The prototype uses IRF250 MOSFET, IR2110 driver and UF5408 diodes. The results reassured the proficiency of designed FLC plus SMC combination over its counterpart PIC plus SMC.

A SiC MOSFET Based High Efficiency Interleaved Boost Converter for More Electric Aircraft

  • Zaman, Haider;Zheng, Xiancheng;Yang, Mengxin;Ali, Husan;Wu, Xiaohua
    • Journal of Power Electronics
    • /
    • 제18권1호
    • /
    • pp.23-33
    • /
    • 2018
  • Silicon Carbide (SiC) MOSFET belongs to the family of wide-band gap devices with inherit property of low switching and conduction losses. The stable operation of SiC MOSFET at higher operating temperatures has invoked the interest of researchers in terms of its application to high power density (HPD) power converters. This paper presents a performance study of SiC MOSFET based two-phase interleaved boost converter (IBC) for regulation of avionics bus voltage in more electric aircraft (MEA). A 450W HPD, IBC has been developed for study, which delivers 28V output voltage when supplied by 24V battery. A gate driver design for SiC MOSFET is presented which ensures the operation of converter at 250kHz switching frequency, reduces the miller current and gate signal ringing. The peak current mode control (PCMC) has been employed for load voltage regulation. The efficiency of SiC MOSFET based IBC converter is compared against Si counterpart. Experimentally obtained efficiency results are presented to show that SiC MOSFET is the device of choice under a heavy load and high switching frequency operation.

Thickness-Vibration-Mode Piezoelectric Transformer for Power Converter

  • Su-Ho lee;Yoo, Ju-Hyun;Yoon, H.S.
    • Transactions on Electrical and Electronic Materials
    • /
    • 제1권3호
    • /
    • pp.1-5
    • /
    • 2000
  • This paper presents a new sort of multilayer piezoelectric ceramic transformer for switching regulation power supplies. This piezoelectric transformer operate in the second thickness resonant vibration mode. Accordingly its resonant frequency is higher than 1 NHz, Because output power is low if input and output part of transformer are consisted of single layer, this research suggests a new method, which is consisted of both input and output part of transformer have 2-layered piezoelectric ceramics, The size of transformer is 20 mm in width and length, and 1.4 mm in thickness, respectively, To design a high efficient switching circuit of the transformer, internal circuit parameters were measured and then weve calculated a parameter of inductor nd capacitor to design a driving circuit, Weve used a MISFET and its driver circuit modified a calp oscillator circuit as the primary switching circuit.

  • PDF

Four Quadrant CMOS Current Differentiated Circuit

  • Parnklang, Jirawath;Manasaprom, Ampaul;Ukritnukul, Anek
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 제어로봇시스템학회 2003년도 ICCAS
    • /
    • pp.948-950
    • /
    • 2003
  • In this literature, the CMOS current mode fout quadrant differentiator circuit is proposed. The implementation is base on an appropriate input stage that converts the input current into a compressed voltage at the input capacitor ($C_{gs}$) of the CMOS driver circuit. This input voltage use as the control output current which flow to the output node by passing through a MOS active load and use it as the feedback voltage to the input node. Simulation results with level 49 CMOS model of MOSIS are given to demonstrate the correct operation of the proposed configuration. But the gain of the circuit is too low so the output differentiate current also low. The proposed differentiator is expected to find several applications in analog signal processing system.

  • PDF

대용량 GTO 구동회로용 Power Supply Unit 개발 (Development of Power Supply Unit for high power GTO driver)

  • 차재덕;양항준;홍순욱;이학성
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 1996년도 하계학술대회 논문집 A
    • /
    • pp.609-612
    • /
    • 1996
  • This paper describes a design and implementation of the practical SMPS(Switched Mode Power Supply) with multi-output independent regulation scheme. The designed SMPS is applied to the PSU(Power Supply Unit) of high power GTO drivers for a inverter system. In order to accomplish precise voltage regulations for both turn-on and turn-off bias voltages of the GTO driver, the conventional forward type PWM converter scheme is adopted with the Post Regulator using a Saturable Reactor. Analytic design criteria and control schemes are described for practical applications. Finally, the precise regulation of multi-output voltages is proved by experimental results.

  • PDF

a-Si TFT Integrated Gate Driver Using Multi-thread Driving

  • Jang, Yong-Ho;Yoon, Soo-Young;Park, Kwon-Shik;Kim, Hae-Yeol;Kim, Binn;Chun, Min-Doo;Cho, Hyung-Nyuck;Choi, Seung-Chan;Moon, Tae-Woong;Ryoo, Chang-Il;Cho, Nam-Wook;Jo, Sung-Hak;Kim, Chang-Dong;Chung, In-Jae
    • Journal of Information Display
    • /
    • 제7권3호
    • /
    • pp.5-8
    • /
    • 2006
  • A novel a-Si TFT integrated gate driver circuit using multi-thread driving has been developed. The circuit consists of two independent shift registers alternating between the two modes, "wake" and "sleep". The degradation of the circuit is retarded because the bias stress is removed during the sleep mode. It has been successfully integrated in 14.1-in. XGA LCD Panel, showing enhanced stability.