• JSTS:Journal of Semiconductor Technology and Science
• /
• 제14권1호
• /
• pp.131-137
• /
• 2014

A 120 GHz voltage controlled oscillator (VCO) with a divider chain including an injection locked frequency divider (ILFD) and six static frequency dividers is demonstrated using 65-nm CMOS technology. The VCO is designed based on the LC cross-coupled push-push structure and operates around 120 GHz. The 60 GHz ILFD at the first stage of the frequency divider chain is based on a similar topology as the core of the VCO to ensure the frequency alignment between the two circuit blocks. The static divider chain is composed of D-flip flops, providing a 64 division ratio. The entire circuit consumes a DC power of 68.5 mW with the chip size of $1385{\times}835{\mu}m^2$.

• 한국군사과학기술학회지
• /
• 제8권3호
• /
• pp.64-72
• /
• 2005

In this paper, we propose a design method of the millimeter-wave(W-Band) waveguide cavity harmonic voltage controlled oscillator(VCO) using a Gunn diode for the armor sensor. Using the 3-dimensional simulation tool(Ansoft $HFSS^{TM}$), we were able to find the impedance matching point between waveguide and Gunn diode and estimate the oscillation frequency. A varactor diode is used for the frequency tuning, and we find out the equation for the calculation of the tunable frequency range. The designed VCO shows good performances; 17dBm output power at 94GHz center frequency, 520MHz frequency tuning range similar to the estimated value(480MHz).

• 전기전자학회논문지
• /
• 제19권4호
• /
• pp.465-471
• /
• 2015

An LC-tuned sinusoidal voltage-controlled oscillator (VCO) using temperature-stable linear operational transconductance amplifiers (OTAs) is presented. Its architecture is based on Hartley oscillator configuration, where the inductor is active one realized with two OTAs and a grounded capacitor. Two diode limiters are used for limiting amplitude. A prototype oscillator built with discrete components exhibits less than 3.1% nonlinearity in its current-to-frequency transfer characteristic from 1.99 MHz to 39.14 MHz and $220ppm/^{\circ}C$ frequency stability to the temperature drift over 0 to $75^{\circ}C$. The total harmonic distortion (THD) is as low as 4.4 % for a specified frequency-tuning range. The simulated phase noise of the VCO is about -108.9 dBc/Hz at 1 MHz offset frequency in frequency range of 0.4 - 46.97 MHz and property of phase noise of VCO is better than colpitts-VCO.

• 한국음향학회지
• /
• 제16권4호
• /
• pp.76-84
• /
• 1997

본 논문은 이동통신기기의 핵심부품중 하나인 VCO를 IC로 설계한 내용을 기술하였다. 설계한 VCO는 배리캡을 사용한 LC 동조형발진기로 구현하였다. 사용한 발진소자중 인덕터는 실리콘 IC 구현상의 난점[8]으로 인해 외부로 구성하고 나머지부분을 모두 IC화 하였다. 제작하는데 사용된 마스크 수는 15개이며 칩 사이즈는 1150um${\times}$780um이다. 제작한 VCO IC를 테스트한 결과 전원전압 5V에서 제어전압을 1V에서 3V로 변화시킬때 880MHz 영역에서 동작하였으며 주파수 천이는 425KHz/V, 주파수 편이는 1.97MHz/T, 캐리어 레벨은 -7dBm, 전류소모는 16.7mA이었다. 또한, 위상 잡음은 50KHz 오프셋에서 -80dBc/Hz 이며 중심주파수에 대한 하모닉응답은 -41dBm 이다. 향후 송수신단을 단일 칩화하기 위해서는 외부회로도 실리콘 기판위에 구현할 수 있는 실리콘 MMIC[1][8]에 대한 연구가 수행되어야 할 것이다.

• 한국통신학회논문지
• /
• 제21권12호
• /
• pp.3215-3226
• /
• 1996

In this paper a K-band harmonic oscillator competitive to ordinary Push-Push type oscillators is introduced. This oscillator is composed of two-X-band dielectric resonance circuits. To favor its harmonic generation, the load effect and the bias effect are studied to allow the maximum harmonic distortion. As results, the dielectric resonated load and the class A bias are used for the 2nd harmonic generation. analytical study for modelling of voltage controlled dielectric resonator is carried out with theoretical background. The performance of the circuit is evaluated by simulation using harmonic balanced method. The novel structure has ont only a voltage tuning circuit but also an output port at fundamental frequency as the function of prescaler for phase lockede loop application on the just single oscillation structure. In experimentation, the output freqneyc of the 2nd harmonic signal is 20.5GHz and the maximum power level of output is +5.5dBm without additional post amplifiers. the harmonic oscillator exhibits -30dBc of high fundamental frequency rejection without added extra filters. The phase noise of -90dBc/Hz at 100kHz off-carrier has been achieved under free running condition, that satisfies phase noise requirement of IESS 308. The proposed oscillator may be utilized as the clean and stable fixed local oscillator in Transmit Block Upconvertor(TBU) or Low oise Block downconvertor(LNB) for K/Ka-band digital communications and satellite broadcastings.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제14권4호
• /
• pp.484-494
• /
• 2014

We describe a digitally controlled oscillator (DCO) which compensates the frequency variations for process, voltage, and temperature (PVT) variations with an accuracy of ${\pm}2.6%$ at 2.5 GHz. The DCO includes an 8 phase current-controlled ring oscillator, a digitally controlled current source (DCCS), a process and temperature (PT)-counteracting voltage regulator, and a bias current generator. The DCO operates at a center frequency of 2.5 GHz with a wide tuning range of 2.2 GHz to 3.0 GHz. At 2.8 GHz, the DCO achieves a phase noise of -112 dBc/Hz at 10 MHz offset. When it is implemented in an all-digital phase-locked loop (ADPLL), the ADPLL exhibits an RMS jitter of 8.9 ps and a peak to peak jitter of 77.5 ps. The proposed DCO and ADPLL are fabricated in 65 nm CMOS technology with supply voltages of 2.5 V and 1.0 V, respectively.

• Journal of electromagnetic engineering and science
• /
• 제16권3호
• /
• pp.191-193
• /
• 2016

This paper proposes a voltage-controlled oscillator (VCO) that has broadband turning and low-level of phase noise characteristics. Due to the micro-strip line resonant circuit with a low Q value, which is applied to the broadband tuning range, the depreciated phase noise performance is compensated by restraining the harmonics of the oscillating frequency. The VCO was designed according to the proposed structure as well as the conventional structure, and the superiority of the proposed structure was verified through its simulation, fabrication, and measurement.

• 한국정보통신설비학회:학술대회논문집
• /
• 한국정보통신설비학회 2006년도 하계학술대회
• /
• pp.179-182
• /
• 2006

This paper introduce a different-type voltage-controlled oscillator (VCO) for PLL frequency synthesizer, And also the architecture of a high speed low-power-consumption CMOS dual-modulus frequency divider is presented. It provides a new approach to high speed operation and low power consumption. The proposed circuits simulate in 0.35 um CMOS standard technology.

• 한국전자통신학회논문지
• /
• 제8권9호
• /
• pp.1277-1283
• /
• 2013

본 논문에서는 마이크로스트립라인 종단형 CSRR구조를 이용하여 X-band 레이다에 사용하는 새로운 전압 제어 발진기를 제안하였다. 마이크로스트립 종단형 CSRR을 발진기와 버퍼 사이에 삽입되는 필터로 사용하여 고주파억압특성을 개선하였다. 측정 결과 제어전압을 0~10V로 가변 하였을 때 9.28~9.39GHz가 발진 하였으며 발진주파수 9.35GHz에서 16.6dBm의 높은 출력을 얻을 수 있었다. 또한 일반적인 발진기 보다 고주파억압 특성이 10.4dB 개선되었다.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
• /
• pp.218-220
• /
• 2004

A new wide-band VCO topology using Miller capacitance is proposed. Contrary to conventional VCO using the Miller capacitance where the variable amplifier gain is negative, the proposed VCO uses both the negative and positive variable amplifier gain to enhance the frequency tuning range significantly. The proposed VCO is simulated using HSPICE. The simulations show that 410MHz and 220MHz frequency tuning range are obtained using the negative .and positive variable amplifier gain, respectively. The tuning range of the proposed VCO is $23\%$ of the center frequency(2.8GHz). The phase noise is -104dBc/Hz at 1MHz offset by simple model. The operating current is only 3.84mA at 2.5V power supply.