• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.696_697
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• 2009

저압배전반(Low-voltage switchgear and controlgear assemblies)에 관한 대표적인 국제규격으로는 IEC 60439 시리즈가 있어, 저압배전반의 형식시험(Type test)시 이 규격을 적용하여 시험하고 있으며, 한편으로 오랫동안 IEC 60439 시리즈의 규격 개정작업이 진행되어 첫 번째로 IEC 60439 시리즈 중 Par1(IEC 60439-1)이 2009년 1월 IEC 61439-1 (Low-voltage switchgear and controlgear assemblies. Part 1 : General rules) 및 IEC 61439-2 (Low-voltage switchgear and controlgear assemblies - Part 2 : Power switchgear and controlgear assemblies)로 대체 되었다. 본 고찰에서는 새로 제정된 61439-1 및 61439-2의 형식시험 항목 및 방법을 개략적으로 소개하여, 신 규격에 의한 배전반 형식시험에 도움을 주고자 한다.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.8
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• pp.42-49
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• 2012

Grid-connected photovoltaic generator system requires high performance PCS(Power Conditioning System) according to the standard of 'Distributed Generation Grid-Connected Technology Standards'. This paper presents the MPPT control method which improves output efficiency through fast tracking to the maximum power point of PV and a reduced self-excited vibration. Secondly, in this paper DVR function was applied to PCS to compensate the voltage sag frequently happening for a power system. The proposed PCS control is analyzed and compared to conventional PCS operating characteristic, the various insolation and loads, and voltage sag condition through PSIM tool. It proves the utility.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.317-320
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• 2003

As a convenient means for the characterization of the wall voltage and wall charge of AC PDPs during the sustain period, an equivalent circuit model for AC PDPs is presented. The equivalent circuit model for AC PDPs consists of capacitors and thyristors. The equivalent circuit model is based on the physical structure of the AC PDP and the I-V characteristic of the discharge space. This equivalent circuit model can be easily implemented in the standard simulators such as SPICE and can easily simulate the variation of the current, charge and voltage involved in AC PDPs as the supply voltage varies.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.537-538
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• 2008

A step-down DC-DC converter with On-chip Compensation for battery-operated portable electronic devices which are designed in 0.18um CMOS standard process. In an effort to improve low load efficiency, this paper proposes the PFM (Pulse Frequency modulation) voltage mode 1MHz switching frequency step-down DC-DC converter with on-chip compensation. Capacitor multiplier method can minimize error amplifier compensation block size by 20%. It allows the compensation block of DC-DC converter be easily integrated on a chip and occupy less layout area. But capacitor multiplier operation reduces DC-DC converter efficiency. As a result, this converter shows maximum efficiency over 87% for the output voltage of 1.8V (input voltage : 3.3V), maximum load current 500mA, and 0.14% output ripple voltage. The total core chip area is $mm^2$.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.759-762
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• 2002

In this paper, a voltage-controlled linear variable resistor (VCLVR) using a floating-gate MOS-FET (FG-MOSFET) is proposed. The proposed-circuit is the grounded VCLVR consists of only an ordinary MOSFET and an FG-MOSFET. The advantage of the proposed VCLVR are low-voltage and wide-input range. Next, as applications, a floating-node voltage controlled variable resistor and an operational transconductance amplifier using the proposed VCLVRs are proposed. The performance of the proposed circuits are characterized through HSPICE simulations with a standard 0.6 ${\mu}$m CMOS process. simulations of the proposed VCLVR demonstrate a resistance value of 40 k$\Omega$ to 338 k$\Omega$ and a THD of less than 1.1 %.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.979-982
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• 2003

Due to the differential transmission technique and low voltage swing, LVDS has been widely used for high speed transmission with low power consumption. This paper presents the design and implementation of interface circuits for 1.5Gb/s operation in 0.35um CMOS technology. The interface circuit ate fully compatible with the low-voltage differential signaling(LVDS) standard. The LVDS proposed in this paper utilizes a sense amplifiers instead of the conventional differential pre-amplifier, which provides a 1.5Gb/s transmission speed with further reduced driver output voltage. Furthermore, the reduced driver output voltage results in reducing the power consumption.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.9
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• pp.1-9
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• 1997

Novel class A CMOS second-generation current conveyors (CCII) using 0.6.mu.m n-well standard CMOS process for high-frequency current-mode signal processing were developed. The CCII consists of a regulated current-cell for the voltage input and a cascode current mirror for the current output. In this architecture, the two input stages are coupled by current mirrors to reduce the current input impedance. Measurements of the fabricated cCII show that the current input impedance is 308 .ohm. and the 3-dB cutoff frequency when used as a voltage amplifier extends beyond 10MHz. The linear dynamic ranges of voltage and current are from -0.5V to 1.5V and from -100.mu.A to +120.mu.A for supply voltage V$\_$DD/ = -V$\_$SS/=2.5V, respectively. The power dissipation is 2 mW and the active chip area is 0.2 * 0.2 [mm$\^$2/].

• Journal of computational fluids engineering
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• v.15 no.3
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• pp.9-15
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• 2010

In this study, we calculated arc discharges and flow characteristics driven by arcs in a thermal puffer chamber, which is one of most outstanding high-voltage interrupters, for understanding the complex physics and the probability of thermal breakdown. The four main parts of arc model for this virtual-reality are radiation, PTFE ablation, Cu evaporation, and turbulence. Among these important parts the turbulence model can be critical to the reliability of computation results during the whole arcing history because the plasma flow is affected by high heat energy and mass momentum. Two turbulence models, the Prandtl's mixing length model and the standard $k-\varepsilon$ model, are applied for these calculations and are compared with pressure-rise inside chamber and arc voltage between the contacts as well as flow characteristics near current zero.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2005.06a
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• pp.1166-1169
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• 2005

This paper describes a new transient voltage suppressor(TVS) with a low insertion loss and a high cut-off frequency to protect antenna circuit from transient voltages. Conventional protection devices have some problems such as a low frequency bandwidth and a high insertion loss. In order to improve these limitations, a coaxal type TVS, which consists of a gas tube is developed. The performance of the proposed transient voltage suppressor is tested by using a combination surge generator specified in IEC 61000-4-5 standard and by using a network analyzer of 40 MHz ${\sim}$ 5 GHz bandwidth. From the experimental results, it is confirmed that the proposed TVS has an enough protection performance in a low insertion loss and a high cut-off frequency.

• Progress in Superconductivity
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• v.4 no.1
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• pp.59-63
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• 2002

10-V Josephson junction array arranged in 8 parallel stripline paths was fabricated using self-aligning and reactive ion etching techniques. These techniques were introduced in detail with aim of obtaining high-quality junctions. The array has 18,184 Josephson junctions with the area of $12\mu\textrm{m}$$\times$$38\mu\textrm{m}$. The gap voltage and minimum critical current density were about 2.7 ㎷ and ／$23 A\textrm{cm}^2$, respectively. And the critical current density and leakage current at 5 volt were about 27 $A／\textrm{cm}^2$ and $5\mu\textrm{A}$, respectively When operated in the frequency range of 76-88 ㎓, the away generated constant voltage steps up to 14-19 V. The step size near 10-V was more than 7 $\mu\textrm{A}$.