• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.10A
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• pp.1223-1229
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• 2004

A variable-gain low-voltage low noise amplifier MMIC operating at 5GHz frequency band is designed and implemented using the ETRI 0.5$\mu\textrm{m}$ GaAs MESFET library process. This low noise amplifier is designed to have the variable gain for adaptive antenna array combined in HIPERLAN/2. The feedback circuit of a resistor and channel resistance controlled by the gate voltage of enhancement MESFET is proposed for the variable-gain low noise amplifier consisted of cascaded two stages. The fabricated variable gain amplifier exhibits 5.5GHz center frequency, 14.7dB small signal gain, 10.6dB input return loss, 10.7dB output return loss, 14.4dB variable gain, and 2.98dB noise figure at V$\_$DD/=1.5V, V$\_$GGl/=0.4V, and V$\_$GG2/=0.5V. This low noise amplifier also shows-19.7dBm input PldB, -10dBm IIP3, 52.6dB SFDR, and 9.5mW power consumption.

• Proceedings of the KIEE Conference
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• 1999.07c
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• pp.1060-1062
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• 1999

This paper proposes a guideline of choosing the optimum stabilizer input considering the gain margin of power system stabilizer between the optimum stabilizer gain and the allowable maximum stabilizer gain in accordance with the five inputs, such as generator shaft speed, bus frequency, electrical power, accelerating power and bus terminal voltage. The local mode damping and exciter mode damping are considered with increasing the stabilizer gain to determine each gain margin of the inputs.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.336-343
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• 2011

This paper introduces a simple variable gain amplifier (VGA) structure that shows an inherently dB-linear gain control property. Requiring no additional components for dB-linear control, the structure is compact and power efficient. The designed two-stage VGA shows a gain control range of 60dB with the gain error in the range of ${\pm}0.4$ dB. The power consumption including the output buffer is 20.4 mW from 1.2 V supply voltage with bandwidth of 630 MHz. The prototype was fabricated in a 0.13 ${\mu}m$ CMOS process and the VGA core occupies 0.06 $mm^2$.

• Journal of the Korean Institute of Telematics and Electronics
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• v.13 no.1
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• pp.11-15
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• 1976

In a MOSFET multivibrator, the gate do not hold into a constant clamp voltage during a conduction period. The analysis of the operation and the 43sign of a MOSFET multivibrator circuit are much more discult than that using a bipolar transistor and a electron tube because of above reason. And therefore, in the designing procedures of the MOSFET monostable multivibrator of this paper, a graphical method is adopted in order to analyze and design easily. The voltage gain curves of the both FETs are drawn using a parameter the voltage Vc across the coupling condenser, and the curves are utilized to investigate the voltages of the drains and the gates and determine the gate bias voltage. The diagram gives also important informations for the design of the multivibrator.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.4
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• pp.315-322
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• 2009

In the conventional boost converter, the actual duty cycle is limited as the output voltage increases due to increased voltage and current stress of the switch and diode and voltage surge caused by diode reverse recovery. In this paper a new non-isolated boost converter suitable for high gain applications is proposed. The proposed converter has voltage gain of around 6 when the duty cycle is 0.5. Since ZVS is achieved under CCM, the proposed converter has wide ZVS range. Also, voltage ratings of switch and diode are the same as one third of output voltage, and ratings of input and output passive components are reduced due to the interleaving. In addition voltage surge caused by diode reverse recovery is negligible due to ZCS turn-off of diodes. Operating principle of the proposed converter is described and validated through theoretical analysis, simulation and experiment.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.9
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• pp.54-61
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• 2016

A 6-Gbps single-ended receiver with a linear equalizer and a self-reference generator is proposed for a high-speed interface with the double data rate. The proposed single-ended receiver uses a common gate amplifier to increase a voltage gain for an input signal with low voltage level. The continuous-time linear equalizer which reduces gain to the low frequencies and achieves high-frequency peaking gain is implemented in the common gate amplifier. Furthermore, a self-reference generator, which is controlled with the resolution 2.1 mV using digital averaging method, is implemented to maximize the voltage margin by removing the offset noise of the common gate amplifier. The proposed single-ended receiver is designed using a 65-nm CMOS process with 1.2-V supply and consumes the power of 15 mW at the data rate of 6 Gbps. The peaking gain in the frequency of 3 GHz of the designed equalizer is more than 5 dB compared to that in the low frequency.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.2
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• pp.124-132
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• 2014

In this paper, we implement a non-time-varying transfer function of the duty ratio to improve the control characteristics in a control system that Input voltage and the output voltage is varied, DC / DC converters for bi-directional charging. When control is performed with using controller gain of conventional design, characteristics of the control is varied to fluctuations of the input voltage. The proposed method is the equivalently removing method for duty ratio in entire control block, by voltage controller gain is changed for inverse of the duty ratio. The proposed non-time-varying duty ratio transfer function is applied to DC / DC converter for bi-directional charging. In this paper, feasibility and superiority is verified through PSIM simulations and experiments.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2005-2015
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• 2016

A high-step-up DC/DC converter for renewable energy systems is proposed. The proposed structure provides high voltage gain by using a coupled inductor without the need for high duty cycles and high turn ratios. The voltage gain is increased through capacitor-charging techniques. In the proposed converter, the energy of the leakage inductors of the coupled inductor is reused. This feature reduces the stress on the switch. Therefore, a switch with low ON-state resistance can be used in the proposed converter to reduce losses and increase efficiency. The main switch is placed in series with the source. Therefore, the converter can control the energy flow from the source to the load. The operating principle is discussed in detail, and a steady state analysis of the proposed converter is conducted. The performance of the proposed converter is verified by experimental results.

• Journal of Power Electronics
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• v.17 no.3
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• pp.579-589
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• 2017

In this study a new high step-up dc-dc converter is presented. The operation of the proposed converter is based on the capacitor switching and coupled inductor with a single active power switch in its structure. A passive voltage clamp circuit with two capacitors and two diodes is used in the proposed converter for elevating the converter's voltage gain with the recovered energy of the leakage inductor, and for lowering the voltage stress on the power switch. A switch with a low $R_{DS}$ (on) can be adopted to reduce conduction losses. In the generalized mode of the proposed converter, to reach a desired voltage gain, capacitor stages with parallel charge and series discharge techniques are extended from both sides of secondary side of the coupled inductor. The proposed converter has the ability to alleviate the reverse recovery problem of diodes with circuit parameters. The operating principle and steady-states analyses are discussed in detail. A 40W prototype of the proposed converter is implemented in the laboratory to verify its operation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.1
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• pp.53-60
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• 2010

This paper presents a novel gain control system composed of a feedback circuit, Two stage Low Noise Amplifier (LNA) using 0.18 um CMOS technology for 5.2 GHz. The feedback circuit consists of the seven function blocks: peak detector, comparator, ADC, IVE(Initial Voltage Elimination) circuit, switch, storage, and current controller. We focus on detecting signal and designing storage circuit that store the previous state. The power consumption of the feedback circuit in the system can be reduced without sacrificing the gain by inserting the storage circuit. The adaptive front-end system with the feedback circuit exhibits 11.39~22.74 dB gain, and has excellent noise performance at high gain mode. Variable gain LNA consumes 5.68~6.75 mW from a 1.8 V supply voltage.