• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.12
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• pp.39-45
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• 1997

This study presents the first experimental data for the impact of hot-carrier degradtion on the performance of CMOS folded-cascode op-amps. A folded-cascode op-amp which has an NMOS input pair has been designed and fabricated using a 0.8.mu.m single-poly, double-metal CMOS process. After high voltage stress, the degradtion of perfomrance parameters such as open-metal CMOS process. After high voltage stress, the degradation of performance parameters such as open-loop voltage gain, unity-gain frequency and phase margin has been analized and physically explaniend in terms of hot carrier degradation.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.407-408
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• 2015

The existing (q)Z-source PWM AC-AC converters have limited voltage gain because of the equivalent series resistance in the Z-source inductor. In order to obtain higher voltage gain than (q)Z-source AC-AC converters, a coupled inductor (or transformer) based Z-source AC-AC converter is proposed in this paper. By increasing turns ratio of the coupled inductor more than 1, the proposed converter can obtain higher output voltage than (q)Z-source converters with the same duty ratio. A 120 W prototype AC-AC converter is built and tested to verify performances of the proposed converter.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.7
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• pp.23-29
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• 2011

A dB-linearity improved variable gain amplifier (VGA) for GPS receiver is presented. The Proposed dB-linear current generator has improved dB-linearity error of ${\pm}0.15$dB. The VGA for GPS is designed using proposed dB-linear current generator and composed of 3 stage amplifiers. The IF frequency is assumed as 4MHz and the linearity requirement of the VGA for GPS receiver is defined as 24dBm of IIP3 using cascaded IIP3 equation and the VGA satisfies 24dBm when minimum gain mode. The DC-offset voltage is eliminated using DC-offset cancelation loop. The gain range is from -8dB to 52dB and the dB-linearity error satisfies ${\pm}0.2$dB. The 3-dB frequency has range of 35MHz~106MHz for the gain range. The VGA is designed using 0.18${\mu}m$ CMOS process. The power consumption is 3mW with 1.8V supply voltage.

• Journal of the Institute of Convergence Signal Processing
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• v.2 no.4
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• pp.71-76
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• 2001

In this paper we propose the Digital Automatic Gain Controller for IEEE 802.11a-High-speed Physical Layer in the 5 GHz Band. The input gain it estimated by calculating the energy of the training symbol that it a synchronizing signal. The renewal gain is calculated by comparing the estimated gain with the ideal gain. The renewal gain is converted into the controlled voltage for GCA to reduce or amplify the input signals. We used a piecewise-linear approximation to reduce the hardware size. The gain control is performed seven times to provide more accurate gain control. The proposed automatic gain controller is designed with VHDL and verified by using the Xilinx FPGA.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.9 no.4
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• pp.141-146
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• 2010

In this paper, bandgap reference PTAT(Proportional to Absolute Temperature) circuit and flexible gain control of LNA(Low Noise Amplifier) which is usable in Zigbee system of 2.4GHz band are designed by TSMC $0.18{\mu}m$ CMOS library. PTAT bandgap reference circuit is proposed to minimize the instability of CMOS circuit which may be unstable in temperature changes. This circuit is designed such that output voltage remains within 1.3V even when the temperature varies from $-40^{\circ}C$ to $-50^{\circ}C$ when applied to the gate bias voltage of LNA. In addition, the LNA is designed to be operated on 2.4GHz which is applicable to Zigbee system and able to select gains by changing output impedance using 4 NMOS operated switches. The simulation result shows that achieved gain is 14.3~17.6dB and NF (Noise Figure) 1.008~1.032dB.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2006.05a
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• pp.302-305
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• 2006

A problem that arises in most communication receivers concerns the wide variation in power level of the signals received at the antenna. These variations cause serious problems which can usually be solved in receiver design by using Automatic Gain Control (AGC). AGC is achieved by using an amplifier whose gain can be controlled by external current or voltage. However, the AGC circuit does not respond to rapid changes in the amplitude of input. If input changes instantaneously, then even if op-amps could follow the change, the envelope detector capacitor could not, since the capacitor's voltage could not change instantaneously. To alleviate this deficiency, we present Improved Automatic Gain Control Circuit (IAGCC) replacing AGC circuit to FLC.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.4
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• pp.461-466
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• 1999

A CMOS op amp with rail-to-rail input and output ranges is designed in a one-volt supply. The output stage of the op amp is used in a common source amplifier that operates in sub-threshold region to design a low voltage op amp with rail-to-tail output range. To drive heavy resistor and capacitor loads with rail-to-rail output ranges, a common source amplifier which has a low output resistance is utilized. A bulk-driven differential pair and a bulk-driven folded cascode amplifier are used in the designed op amp to increase input range and achieve 1 V operation. Post layout simulation results show that low frequency gain is about 58 ㏈ and gain bandwidth I MHz. The designed op amp has been fabricated in a 0.8${\mu}{\textrm}{m}$ standard CMOS process. The measured results show that this op amp provides rail-to-rail output range, 56㏈ dc gain with 1 MΩ load and has 0.4 MHz gain-bandwidth with 130 ㎊ and 1 kΩ loads.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.5
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• pp.666-670
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• 2014

TEM Horn antenna is typically used in HPEM area. It is necessary to apply a high voltage of the antenna for radiating HPEM. Then, it is necessary to insulate essentially of applying a high voltage to the antenna. At this time, radiation pattern and gain of the TEM Antenna is changed. For this reason, it is necessary to analyze changing characteristics by using simulation. In this paper, I analyzed the radiation pattern of the antenna in accordance with the lens and insulating material. As a result, it was observed that the value of the gain is changed in accordance with the frequency. The lens is used for the antenna, the gain characteristic is improved.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.309-312
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• 2002

In this paper, we discuss the design of high gain low noise amplifier by using the 0.2sum CMOS technology. A cascode inverter is adopted to implement the low noise amplifier. The proposed cascode inverter LNA is one stage amplifier with a voltage reference and without choke inductors. The designed 2.4GHz LNA achieves a power gain of 25dB, a noise figure of 2.2dB, and power consumption of 255㎽ at 2.5V power supply.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2001.06a
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• pp.101-104
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• 2001

In this paper, we propose the Digital Automatic Gain Controller for IEEE 802.11a High-speed Physical Layer in the 5 GHz Band. The input gain is estimated by calculating the energy of the training symbol that is a synchronizing signal. The renewal gain is calculated by comparing the estimated gain with the ideal gain. The renewal gain is converted into the controlled voltage for GCA to reduce or amplify the input signals. We used a piecewise-linear approximation to reduce the hardware size. The gain control is performed seven times to provide more accurate gain control. The proposed automatic gain controller is designed with VHDL and verified by using the Xilinx FPGA.