• 한국세라믹학회지
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• 제46권1호
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• pp.30-34
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• 2009

A Sand blasting technology has been used to address via and trench processing of glass wafer of optic semiconductor packaging. Manufactured sand blast that is controlled by blast nozzle and servomotor so that 8" wafer processing may be available. 10mm sq test device manufactured by Dry Film Resist (DFR) pattern process on 8" glass wafer of $500{\mu}m's$ thickness. Based on particle pressure and the wafer transfer speed, etch rate, mask erosion, and vertical trench slope have been analyzed. Perfect 500 um tooling has been performed at 0.3 MPa pressure and 100 rpm wafer speed. It is particle pressure that influence in processing depth and the transfer speed did not influence.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.629-632
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• 1998

This paper presents a new and simple technique to realize high Q inductor on low resistivity silicon wafer with 6 $\Omega$.cm. This technique is very compatible with bipolar and CMOS standard silicon process. By forming the deep and narrow trenches on the low resistivity wafer substrate under inductor pattern, oxidizing and filling with undoped polysilicon, the low resistivity silicon wafer acts as high resistivity wafer being suitable for the fabrication of high Q inductor. By using this technique the quality factor (Q) for 8-turn spiral inductor was improved up to max. 10.3 at 2 ㎓ with 3.0 $\mu\textrm{m}$ of metal thickness. The experiment results show that Q on low resistivity silicon wafer with the trench technique have been improved more than 2 times compared to the conventional low resistivity silicon wafer without trenches.

• 한국재료학회지
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• 제26권9호
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• pp.455-459
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• 2016

The deposition process for the gap-filling of sub-micrometer trenches using DMDMOS, $(CH_3)_2Si(OCH_3)_2$, and $C_xH_yO_z$ by flowable chemical vapor deposition (F-CVD) is presented. We obtained low-k films that possess superior gap-filling properties on trench patterns without voids or delamination. The newly developed technique for the gap-filling of submicrometer features will have a great impact on IMD and STI for the next generation of microelectronic devices. Moreover, this bottom up gap-fill mode is expected to be universal in other chemical vapor deposition systems.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 춘계학술대회 논문집 전자세라믹스 센서 및 박막재료 반도체재료 일렉트렛트 및 응용기술
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• pp.14-17
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• 2000

The rise throughput and the stability in fabrication of device can be obtained by applying of CMP process to STI structure in 0.18um semiconductor device. To employ in STI CMP, the reverse moat process has been added thus the process became complex and the defects were seriously increased. Removal rates of each thin films in STi CMP was not equal hence the devices must to be effected, that is, the damage was occured in the device dimension in the case of excessive CMP process and the nitride film was remained on the device dimension in the case of insufficient CMP process than these defects affect the device characteristics. We studied the current sensing method in STI-CMP with the reverse moat pattern.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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• pp.211-213
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• 1999

In this paper, we documented the controlling oxide removal amount on the pattern wafer using removal rate and removal thickness of blanket wafer. There was the strong correlation relationship for both(correlation factor:0.7109). So, we could confirm the repeatability as applying for STI CMP process from the obtained linear formular. As the result of repeatability test, the difference of calculated polishing time and actual polishing time was 3.48 seconds based on total 50 lots. If this time is converted into the thickness, it is from 104$\AA$ to 167$\AA$. It is possible to be ignored because it is under the process margin.

• 기술사
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• 제21권4호
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• pp.12-18
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• 1988

On the foundation work of Po-Ryong power plant #3 & #4. It was 30meters away from the running states of #1 & #2 plant site. In order to protect the #1 & #2 power plant facilities & factory structure. Allowable vibration was required below 0.07 gal. Therefore, it had to set up the anti-vibration trench to reduce the vibration reference and secondary. I applied the low gravity and low velocity explosives with M/S delay caps by cautious blasting pattern.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.53-53
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• 2011

As the dimension of Cu interconnects has continued to reduce, its resistivity is expected to increase at the nanoscale due to increased surface and grain boundary scattering of electrons. To suppress increase of the resistivity in nanoscale interconnects, alloying Cu with other metal elements such as Al, Mn, and Ag is being considered to increase the mean free path of the drifting electrons. The formation of Al alloy with a slight amount of Cu broadly studied in the past. The study of Cu alloy including a very small Al fraction, by contrast, recently began. The formation of Cu-Al alloy is limited in wet chemical bath and was mainly conducted for fundamental studies by sputtering or evaporation system. However, these deposition methods have a limitation in production environment due to poor step coverage in nanoscale Cu metallization. In this work, gap-filling of Cu-Al alloy was conducted by cyclic MOCVD (metal organic chemical vapor deposition), followed by thermal annealing for alloying, which prevented an unwanted chemical reaction between Cu and Al precursors. To achieve filling the Cu-Al alloy into sub-100nm trench without overhang and void formation, furthermore, hydrogen plasma pretreatment of the trench pattern with Ru barrier layer was conducted in order to suppress of Cu nucleation and growth near the entrance area of the nano-scale trench by minimizing adsorption of metal precursors. As a result, superconformal gap-fill of Cu-Al alloy could be achieved successfully in the high aspect ration nanoscale trenches. Examined morphology, microstructure, chemical composition, and electrical properties of superfilled Cu-Al alloy will be discussed in detail.

• 한국분말재료학회지
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• 제20권2호
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• pp.120-124
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• 2013

This study is carried out to develop the new process for the fabrication of ultra-fine electrodes on the flexible substrates using superhydrophobic effect. A facile method was developed to form the ultra-fine trenches on the flexible substrates treated by plasma etching and to print the fine metal electrodes using conductive nano-ink. Various plasma etching conditions were investigated for the hydrophobic surface treatment of flexible polyimide (PI) films. The micro-trench on the hydrophobic PI film fabricated under optimized conditions was obtained by mechanical scratching, which gave the hydrophilic property only to the trench area. Finally, the patterning by selective deposition of ink materials was performed using the conductive silver nano-ink. The interface between the conductive nanoparticles and the flexible substrates were characterized by scanning electron microscope. The increase of the sintering temperature and metal concentration of ink caused the reduction of electrical resistance. The sintering temperature lower than $200^{\circ}C$ resulted in good interfacial bonding between Ag electrode and PI film substrate.

• 한국산학기술학회논문지
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• 제16권7호
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• pp.4405-4410
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• 2015

두 개의 1차원 주기 패턴을 수직으로 중첩시켜 상하층 패턴으로부터 이축 변위 정보를 각각 디코딩할 수 있는 방법을 제안한다. 투명한 상층 패턴 판별은 굴절률차에 기인한 레이저 빔의 디플렉션 검출을 통해 이뤄지고 하층 패턴 판별은 수광 전압 차의 검출를 통해 이뤄진다. 빌드 업 필름 재질의 상층 패턴은 UV 레이저 가공에 의해 미세가공되고 그리고 알루미늄 하층 패턴은 초정밀 머시닝에 의한 트렌치 가공과 불투명 소재 증착 그리고 폴리싱 과정을 통해 제작된다. 10마이크로미터 간격으로 제작된 샘플 패턴과 이를 인코딩할 수 있는 전용 광학계에 의한 변위 측정 방법은 대면적 스테이지에 장착되어 레이저 간섭계를 이용한 측정데이터와 비교하여 검증된다.

• 한국진공학회지
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• 제4권S1호
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• pp.190-195
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• 1995

The feature scale model for selective chemical vapor deopsition process was proposed and the simulation was performed to study the selectivity and uniformity of deposited thin film using Monte Carlo method and string algorithm. The effect of model parameters such as sticking coefficient, aspect ratio, and surface diffusion coefficient on the deposited thin film pattern was improved for lower sticking coefficient and higher aspect ratio. It was revealed that the selectivity loss ascrives to the surface diffusion. Different values of sticking coefficients on Si and on SiO2 surface greatly influenced the deopsited thin film profile. In addition, as the lateral wall angle decreased, the selectively deposited film had improved uniformity except the vicinity of trench wall. The optimum eondition for the most flat selective film deposition pattern is the case with low sticking coefficient and slightly increased surface diffusion coefficient.