• ETRI Journal
• /
• 제31권6호
• /
• pp.784-794
• /
• 2009

We present a full HD (1080p) H.264/AVC High Profile hardware encoder based on fast motion estimation (ME). Most processing cycles are occupied with ME and use external memory access to fetch samples, which degrades the performance of the encoder. A novel approach to fast ME which uses shared multibank memory can solve these problems. The proposed pixel subsampling ME algorithm is suitable for fast motion vector searches for high-quality resolution images. The proposed algorithm achieves an 87.5% reduction of computational complexity compared with the full search algorithm in the JM reference software, while sustaining the video quality without any conspicuous PSNR loss. The usage amount of shared multibank memory between the coarse ME and fine ME blocks is 93.6%, which saves external memory access cycles and speeds up ME. It is feasible to perform the algorithm at a 270 MHz clock speed for 30 frame/s real-time full HD encoding. Its total gate count is 872k, and internal SRAM size is 41.8 kB.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
• /
• pp.77-81
• /
• 2004

In this paper, we propose a analog front-end (AFE) for noncoherent On-Off Keying (OOK) Ultra Wide Band (UWB) system based on power detection. The proposed AFE are designed using 0.18 micron CMOS technology and verified by simulation using SPICE. The proposed AFE consist of Sample-and-Hold block, Analog-to-Digital converter, synchronizer, delayed clock generator and impulse generator. The time resolution of 1ns is obtained with 100MHz system clocks and the synchronized 10-bit digital outputs are delivered to the baseband. The impulse generator produces 1ns width pulse using digital CMOS gates. The simulation results show the feasibility of the proposed UWB AFE systems.

• 한국통신학회논문지
• /
• 제35권4C호
• /
• pp.337-342
• /
• 2010

본 논문에서는 GF($2^m$) 상에서 새로운 저복잡도 디지트병렬/비트직렬 곱셈기를 제안한다. 제안된 곱셈기는 GF($2^m$)의 다항식기저에서 동작하며, D 클럭 사이클마다 곱셈의 결과를 출력한다. 여기에서 D는 임의로 선택할 수 있는 디지트의 크기이다. 디지트병렬/비트직렬 곱셈기는 기존의 비트직렬 곱셈기 보다는 짧은 지연시간에 곱셈 의 결과를 얻을 수 있고, 비트병렬 곱셈기 보다는 적은 하드웨어로 구현할 수 있다. 따라서 회로의 복잡도와 지연 시간 사이에 적절한 절충을 꾀할 수 있는 장점을 가지고 있다. 그러나 기존의 디지트병렬/비트직렬 곱셈기는 속도 를 향상시키기 위하여 더 많은 하드웨어를 사용하였다. 본 논문에서는 하드웨어 복잡도를 낮춘 새로운 디지트병렬 /비트직렬 곱셈기를 설계한다.

• 한국전기전자재료학회논문지
• /
• 제21권2호
• /
• pp.151-155
• /
• 2008

KHST(Korean High Speed Train) has been utilized the total measurement system which evaluates the efficiency and a breakdown of the vehicle and it's results effect to secure reliability of the vehicle. Generally KHST has been received pulse signals from the wheel. It calculates the travel distance after counter the signals to confirm location information of the vehicle. However, there is a limit to measure the location of the vehicle due to slip, slide and the wheel attrition. We have developed a new measurement system by using GPS to complement those errors. In general, GPS receivers are composed of an antenna, tuned to the frequencies transmitted by the satellites, receiver-processors, and a highly-stable clock The GPS mounted on the roof of TT4 in KHST receives a signal from the RS232 communication port. It is connected to the network system in TT3 after converting with TCPIP communication. It is able to track the position of vehicle and synchronize the signal from different measurement system simultaneously. Therefore it is able to chase the fault occurrence, track inspection and electrical interruption at real-time situation more accurately. There is not an error coursed by vehicle conditions such as slip and the slide.

• Journal of Yeungnam Medical Science
• /
• 제2권1호
• /
• pp.77-80
• /
• 1985

심전도에 의한 R-R 간격변동은 자율신경계의 기능을 검사하는데 매우 유용하고 또한 교감 신경계와 부교감신경계의 가능을 정량적으로 알아낼 수 있을 것으로 사료되었다. 특히, 당뇨병질환에 있어서 자율신경계의 dysfunction현상을 고찰하는데 매우 유용할 것으로 기대된다(Fig.5 참조). 그러나 임상에 직접 적용시켜온 바로는 기립시, 심호흡시에 발생되는 근전도에 의한 잡음이 간혹 발생되는 경우가 있는데 이것은 전극접착법과 무선송신기에 의해 제거될 것으로 기대되며 향후의 과제로 남아있다.

• ETRI Journal
• /
• 제32권4호
• /
• pp.493-502
• /
• 2010

The operation time of an encoder is one of the critical implementation issues for satisfying the timing requirements of Long Term Evolution (LTE) systems because the encoder is based on binary operations. In this paper, we propose a design and implementation of a latency efficient encoder for LTE systems. By virtue of 8-bit parallel processing of the cyclic redundancy checking attachment, code block (CB) segmentation, and a parallel processor, we are able to construct engines for turbo codings and rate matchings of each CB in a parallel fashion. Experimental results illustrate that although the total area and clock period of the proposed scheme are 19% and 6% larger than those of a conventional method based on a serial scheme, respectively, our parallel structure decreases the latency by about 32% to 65% compared with a serial structure. In particular, our approach is more latency efficient when the encoder processes a number of CBs. In addition, we apply the proposed scheme to a real system based on LTE, so that the timing requirement for ACK/NACK transmission is met by employing the encoder based on the parallel structure.

• 제어로봇시스템학회논문지
• /
• 제11권4호
• /
• pp.314-321
• /
• 2005

In this paper an intelligence embedding quadruped pet robot is described. It has 15 degrees of freedom and consists of various sensors such as CMOS image, voice recognition and sound localization, inclinometer, thermistor, real-time clock, tactile touch, PIR and IR to allows owners to interact with pet robot according to human's intention as well as the original features of pet animals. The architecture is flexible and adopts various embedded processors for handling sensors to provide modular structure. The pet robot is also used for additional purpose such like security, gaming visual tracking, and research platform. It is possible to generate various actions and behaviors and to download voice or music files to maintain a close relation of users. With cost-effective sensor, the pet robot is able to find its recharge station and recharge itself when its battery runs low. To facilitate programming of the robot, we support several development environments. Therefore, the developed system is a low-cost programmable entertainment robot platform.

• 전자공학회논문지B
• /
• 제32B권11호
• /
• pp.1527-1535
• /
• 1995

This paper introduces an isolated word recognition system realized on a neurocomputer called E-MIND II, which is a 2-D torus wavefront array processor consisting of 256 DNP IIs. The DNP II is an all digital VLSI unit processor for the EMIND II featuring the emulation capability of more than thousands of neurons, the 40 MHz clock speed, and the on-chip learning. Built by these PEs in 2-D toroidal mesh architecture, the E- MIND II can be accelerated over 2 Gcps computation speed. In this light, the advantages of the E-MIND II in its capability of computing speed, scalability, computer interface, and learning are especially suitable for real time application such as speech recognition. We show how to map a TDNN structure on this array and how to code the learning and recognition algorithms for a user independent isolated word recognition. Through hardware simulation, we show that recognition rate of this system is about 97% for 30 command words for a robot control.

• 수면정신생리
• /
• 제5권1호
• /
• pp.1-11
• /
• 1998

Chronobiology is the area of medicine that is, how time-related event shape our daily biologic responses and apply to any aspect of medicine with regard to altering pathophysiology and treatment response. In mammals, there are several evidences that prove suprachiasmatic nuclei(SCN) is the major circadian pacemaker and the circadian rhythm influences so many biological aspects of an living organism such as rest-activity, thermoregulation, reproduction, and endocrine system. In case of human beings, there had been little information of circadian system. That may be due to the experimental, technical difficulties to study but also to the fact that human has the more complex environments that may alter the circadina rhythm like the artificial light, many socio-cultural aspects and so forth. However, several reports of these days indicate human's circadian system is composed of two or more circadian oscillators and SCN is the major circadian oscillator among them like the other mammals. Free-running circadinan period of mankind is about 24 hours rather than about 25 hours, and rest-activity rhythm is polymodal like other species. In addition to that, human may have capcities to change the circadian rhythm as the seasonal changes of daynight schedule. In this article, the author will summarize recent progress of anatomy and physiology of the circadian clock mechanism in humans.

• 한국정보통신학회논문지
• /
• 제19권9호
• /
• pp.2081-2086
• /
• 2015

링 발진기를 이용한 온도센서를 공급전압 1.5volts를 사용하여 0.18㎛ CMOS 공정으로 설계하였다. 온도센서는 온도가 변화하더라도 일정한 출력주파수를 가지는 링 발진기와 온도가 증가하면 출력주파수가 감소하는 링 발진기를 이용하여 설계하였다. 온도를 디지털 값으로 변환하기 위해 온도에 무관한 링 발진기의 출력 신호는 카운터의 클럭 신호로 사용하였으며, 온도에 따라 변화하는 링 발진기의 출력신호는 카운터의 인에이블 신호로 사용하였다. 설계된 회로의 HPICE 시뮬레이션 결과 회로의 동작온도가 -20℃에서 70℃까지 변화할 때 온도 에러는 -0.7℃에서 1.0℃ 이내였다.