• Proceedings of the KIEE Conference
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• 2006.07a
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• pp.553-554
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• 2006

본 연구의 목적은 Pspice를 이용하여 SI Thyristor의 구조적인 특징과 스위칭 동작을 설명하면서도 비교적 간략화 된 등가 모델을 개발하는 것에 있다. 이러한 목표로 등가모델은 SI Thyristor의 구조적 형태에 기반을 두어 BJT 소자를 이용한다. 또 게이트 구조와 스위칭 매커니즘을 고려한 MOSFET, Steady state Turn on 상태에서 dominant 모델인 PIN Diode로 구성되어 있다. 개발된 등가모델을 스너버회로와 함께 스위칭 과도응답을 시뮬레이션 하였으며, 그 결과는 실제 실험결과와 비교하여 검증하였다. 비교적 간단하게 고안된 회로를 통해 Turn On/Off 동작에서 스위칭 특성을 예측할 수 있으므로 펄스파워용 스위치로서 SI Thyristor의 시동특성을 해석하는데 본 등가모델을 활용할 수 있을 것으로 전망한다.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.12
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• pp.773-776
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• 1999

A newly proposed lateral dual-gate thyristor was fabricated and measured, which has excellent current saturation characteristics of $1200A/cm^2$ even at an anode-gate voltage of 29V, through the elimination of the structurally existing parasitic thyristor. And through the comparison with the LIGBT, the excellent current saturation characteristics of a newly proposed device was verified.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.3
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• pp.183-189
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• 2010

In this paper, the trench gate emitter switched thyristor(EST) withl trench gate electrode is proposed for improving snap-back effect which leads to a lot of problems in device applications. The parasitic thyristor which is inherent in the conventional EST is completely eliminated in this structure, allowing higher maximum controllable current densities for ESTs. The dual trench gate allows homogenous current distribution in the EST and preserves the unique feature of the gate controlled current saturation of the thyristor current. The characteristics of the 1700 V forward blocking EST obtained from two-dimensional numerical simulations (MEDICI) is described and compared with that of a conventional EST. we carried out layout, design and process of EST devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.357-360
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• 2003

In this paper, we designed 4.5kV/1.5kA IGCT devices. GCT thyristor has many superior characteristics compared with GTO thyristor, for examples; snubberless turn-off capability, short storage time, high turn-on capability, small turn-off gate charge and low total power loss of the application system containing device and peripheral parts such as anode reactor and snubber capacitance. In this paper we designed GCT thyristor devices, and analyzed static and dynamic characteristics of GCT thyristor depending on the minority carrier lifetime, n-base thickness and doping concentration of n-base region, respectively. Especially, turn-on and turn-off characteristics are very important characteristics for GCT thyristor devices. So, we considered above characteristic for design and analysis of GCT devices.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.33 no.4
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• pp.127-133
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• 1984

In this paper the performance of a variable-phase thyristor motor combined with a phase splitter and a single-phase tapped induction motor is investigated. The phase splitter consists of a bridge type thyristor switching circuit. The regulating power flow of the phase splitter is obtained from the switching phase difference of thyristor switching sequences. The proper switching performance improves the torque-speed-characteristics of the motor and its operation efficiency. We simplify the motor system th using the tapped windng reactances of the motor as the complementary element of the thyristor phase splitter. We discussed the practicality of this motor system through the analysis of simulation result and the voltage and the current wave forms obtained froms obtained from the experiment.

• Proceedings of the KIEE Conference
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• 2006.07b
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• pp.1219-1220
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• 2006

본 연구의 목적은 Pspice를 이용하여 SI Thyristor의 구조적인 특징과 스위칭 동작을 설명하면서도 비교적 간략화된 등가 모델을 개발하는 것에 있다. 이러한 목표로 등가모델은 SI Thyristor의 구조적 형태에 기반을 두어 BJT 소자를 이용한다. 또 게이트 구조와 스위칭 매커니즘을 고려한 MOSFET, Steady state Turn on 상태에서 dominant 모델인 PIN Diode로 구성되어 있다. 개발된 등가모델을 스너버회로와 함께 스위칭 과도응답을 시뮬레이션하였으며 그 결과는 실제 실험결과와 비교하여 검증하였다. 비교적 간단하게 고안된 회로를 통해 Turn On/Off 동작에서 스위칭 특성을 예측할 수 있으므로 펄스파워용 스위치로서 SI Thyristor의 시동특성을 해석하는 데 본 등가모델을 활용할 수 있을 것으로 전망한다.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.6
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• pp.573-579
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• 2015

A control algorithm of thyristor dual converter power system is proposed in this study for a railway power substation. The thyristor dual converter can use regenerative power without an additional system using control algorithm. An autonomous voltage and mode change method is also proposed to provide uninterrupted power to the railway. A 10 kW reduced model of the thyristor dual converter power system is built and tested to verify the validity of the proposed control algorithm.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1679-1680
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• 2006

본 연구의 목적은 Pspice를 이용하여 SI Thyristor의 구조적인 특징과 스위칭 동작을 설명하면서도 비교적 간략화된 등가 모델을 개발하는 것에 있다. 이러한 목표로 등가모델은 SI Thyristor의 구조적 형태에 기반을 두어 BJT 소자를 이용한다. 또 게이트 구조와 스위칭 매커니즘을 고려한 MOSFET, Steady state Turn on 상태에서 dominant 모델인 PIN Diode로 구성되어 있다. 개발된 등가모델을 스너버회로와 함께 스위칭 과도응답을 시뮬레이션하였으며 그 결과는 실제 실험결과와 비교하여 검증하였다. 비교적 간단하게 고안된 회로를 통해 Turn On/off 동작에서 스위칭 특성을 예측할 수 있으므로 펄스파워용 스위치로서 SI Thyristor의 시동특성을 해석하는 데 본 등가모델을 활용할 수 있을 것으로 전망한다.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.2
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• pp.459-467
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• 2017

An urban railway power substation consists of three thyristor dual converters. Two converters are connected to up and down trolley line to supply the electric energy or feed the regenerative energy back to the distribution. When the two converters break down, the remaining converter is used in an emergency. One thyristor dual converter system (TDCS) manages the energy of two or three railway stations. If the TDCS fails, the trains stop operating. To solve the problem, this paper proposes the three parallel operation control algorithm of thyristor dual converter system using the emergency converter. The broken TDCS can be replaced by the emergency converter in other TDCS. The effectiveness of this proposed control is verified by simulation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.131-132
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• 2005

In this paper, the capacitance properties of degraded thyristor with temperature and voltage were presented. As degraded thyristor, 8 thyristors with each other different reverse blocking voltage used. Its impedance and resistance properties were measured from frequency 100Hz to 10MHz applied with bias voltage from 0V to 40V. As a result, at low frequency region, that is, at the frequency 100 - 10kHz, the abrupt increasement of its capacitance was confirmed. And also, at high frequency region, the capacitance peak move toward low frequency in the region of frequency 4 - 6MHz as degradation of thyristor.