• Title/Summary/Keyword: thin film transistors(TFTs)

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Effects of 4MP Doping on the Performance and Environmental Stability of ALD Grown ZnO Thin Film Transistor

  • Kalode, Pranav Y.;Sung, M.M.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.471-471
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    • 2013
  • Highly stable and high performance amorphous oxide semiconductor thin film transistors (TFTs) were fabricated using 4-mercaptophenol (4MP) doped ZnO by atomic layer deposition (ALD). The 4 MP concentration in ZnO films were varied from 1.7% to 5.6% by controlling Zn: 4MP pulses. The carrier concentrations in ZnO thin films were controlled from $1.017{\times}10^{20}$/$cm^3$ to $2,903{\times}10^{14}$/$cm^3$ with appropriate amount of 4MP doping. The 4.8% 4MP doped ZnO TFT revealed good device mobility performance of $8.4cm^2V-1s-1$ and on/off current ratio of $10^6$. Such 4MP doped ZnO TFTs were stable under ambient conditions for 12 months without any apparent degradation in their electrical properties. Our result suggests that 4 MP doping can be useful technique to produce more reliable oxide semiconductor TFT.

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Physics-Based SPICE Model of a-InGaZnO Thin-Film Transistor Using Verilog-A

  • Jeon, Yong-Woo;Hur, In-Seok;Kim, Yong-Sik;Bae, Min-Kyung;Jung, Hyun-Kwang;Kong, Dong-Sik;Kim, Woo-Joon;Kim, Jae-Hyeong;Jang, Jae-Man;Kim, Dong-Myong;Kim, Dae-Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.3
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    • pp.153-161
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    • 2011
  • In this work, we report the physics-based SPICE model of amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) and demonstrate the SPICE simulation of amorphous InGaZnO (a-IGZO) TFT inverter by using Verilog-A. As key physical parameter, subgap density-of-states (DOS) is extracted and used for calculating the electric potential, carrier density, and mobility along the depth direction of active thin-film. It is confirmed that the proposed DOS-based SPICE model can successfully reproduce the voltage transfer characteristic of a-IGZO inverter as well as the measured I-V characteristics of a-IGZO TFTs within the average error of 6% at $V_{DD}$=20 V.

Comparative Study on Interfacial Traps in Organic Thin-Film Transistors According to Deposition Methods of Organic Semiconductors

  • Park, Jae-Hoon;Bae, Jin-Hyuk
    • Journal of the Korean Applied Science and Technology
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    • v.30 no.2
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    • pp.290-296
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    • 2013
  • We analysed interfacial traps in organic thin-film transistors (TFTs) in which pentacene and 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS-pentacene) organic semiconductors were deposited by means of vacuum-thermal evaporation and drop-coating methods, respectively. The thermally-deposited pentacene film consists of dentritic grains with the average grain size of around 1 m, while plate-like crystals over a few hundred microns are observed in the solution-processed TIPS-pentacene film. From the transfer characteristics of both TFTs, lower subthreshold slope of 1.02 V/decade was obtained in the TIPS-pentacene TFT, compared to that (2.63 V/decade) of the pentacene transistor. The interfacial trap density values calculated from the subthreshold slope are about $3.4{\times}10^{12}/cm^2$ and $9.4{\times}10^{12}/cm^2$ for the TIPS-pentacene and pentacene TFTs, respectively. Herein, lower subthreshold slope and less interfacial traps in TIPS-pentacene TFTs are attributed to less domain boundaries in the solution-processed TIPS-pentacene film.

A Protective Layer on the Active Layer of Al-Zn-Sn-O Thin-Film Transistors for Transparent AMOLEDs

  • Cho, Doo-Hee;KoPark, Sang-Hee;Yang, Shin-Hyuk;Byun, Chun-Won;Cho, Kyoung-Ik;Ryu, Min-Ki;Chung, Sung-Mook;Cheong, Woo-Seok;Yoon, Sung-Min;Hwang, Chi-Sun
    • Journal of Information Display
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    • v.10 no.4
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    • pp.137-142
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    • 2009
  • Transparent top-gate Al-Zn-Sn-O (AZTO) thin-film transistors (TFTs) with an $Al_2O_3$ protective layer (PL) on an active layer were studied, and a transparent 2.5-inch QCIF+AMOLED (active-matrix organic light-emitting diode) display panel was fabricated using an AZTO TFT backplane. The AZTO active layers were deposited via RF magnetron sputtering at room temperature, and the PL was deposited via two different atomic-layer deposition (ALD) processes. The mobility and subthreshold slope were superior in the TFTs annealed in vacuum and with oxygen plasma PLs compared to the TFTs annealed in $O_2$ and with water vapor PLs, but the bias stability of the TFTs annealed in $O_2$ and with water vapor PLs was excellent.

Bottom Gate Microcrystalline Silicon TFT Fabricated on Plasma Treated Silicon Nitride

  • Huang, Jung-Jie;Chen, Yung-Pei;Lin, Hung-Chien;Yao, Hsiao-Chiang;Lee, Cheng-Chung
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.218-221
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    • 2008
  • Bottom-gate microcrystalline silicon thin film transistors (${\mu}c$-Si:H TFTs) were fabricated on glass and transparent polyimide substrates by conventional 13.56 MHz RF plasma enhanced chemical vapor deposition at $200^{\circ}C$. The deposition rate of the ${\mu}c$-Si:H film is 24 nm/min and the amorphous incubation layer near the ${\mu}c$-Si:H/silicon nitride interface is unobvious. The threshold voltage of ${\mu}c$-Si:H TFTs can be improved by $H_2$ or $NH_3$ plasma pretreatment silicon nitride film.

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Effect of Organic Solvent-Modification on the Electrical Characteristics of the PCBM Thin-Film Transistors on Plastic substrate (플라스틱 기판상에 제작된 PCBM 박막 트랜지스터의 전기적 특성에 대한 유기 용매 최적화의 효과에 대한 연구)

  • Hyung, Gun-Woo;Lee, Ho-Won;Koo, Ja-Ryong;Lee, Seok-Jae;Kim, Young-Kwan
    • Journal of the Korean Applied Science and Technology
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    • v.29 no.2
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    • pp.199-204
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    • 2012
  • Organic thin-film transistors (OTFTs) have received considerable attention because their potential applications for nano-scale thin-film structures have been widely researched for large-scale integration industries, such as semiconductors and displays. However, research in developing n-type materials and devices has been relatively shortage than developing p-type materials. Therefore, we report on the fabrication of top-contact [6,6]-phenyl-C61-butyricacidmethylester (PCBM) TFTs by using three different solvent, o-dichlorobenzene, toluene and chloroform. An appropriate choice of solvent shows that the electrical characteristics of PCBM TFTs can be improved. Moreover, our PCBM TFTs with the cross-linked Poly(4-vinylphenol) dielectric layer exhibits the most pronounced improvements in terms of the field-effect mobility (${\sim}0.034cm^2/Vs$) and the on/off current ratio (${\sim}1.3{\times}10^5$) for our results. From these results, it can be concluded that solvent-modification of an organic semiconductor in PCBM TFTs is useful and can be extended to further investigations on the PCBM TFTs having polymeric gate dielectrics. It is expected that process optimizations using solution-processing of organic semiconductor materials will allow the development of the n-type organic TFTs for low-cost electronics and various electronic applications.

Electrical stabilities of half-Corbino thin-film transistors with different gate geometries

  • Jung, Hyun-Seung;Choi, Keun-Yeong;Lee, Ho-Jin
    • Journal of Information Display
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    • v.13 no.1
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    • pp.51-54
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    • 2012
  • In this study, the bias-temperature stress and current-temperature stress induced by the electrical stabilities of half-Corbino hydrogenated-amorphous-silicon (a-Si:H) thin-film transistors (TFTs) with different gate electrode geometries fabricated on the same substrate were examined. The influence of the gate pattern on the threshold voltage shift of the half-Corbino a-Si:H TFTs is discussed in this paper. The results indicate that the half-Corbino a-Si:H TFT with a patterned gate electrode has enhanced power efficiency and improved aperture ratio when compared with the half-Corbino a-Si:H TFT with an unpatterned gate electrode and the same source/drain electrode geometry.

Effect of the Hydrophobicity of Hybrid Gate Dielectrics on a ZnO Thin Film Transistor

  • Choi, Woon-Seop;Kim, Se-Hyun
    • Transactions on Electrical and Electronic Materials
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    • v.11 no.6
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    • pp.257-260
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    • 2010
  • Zinc oxide (ZnO) bottom-contact thin-film transistors (TFTs) were prepared by the use of injector type atomic layer deposition. Two hybrid gate oxide systems of different polarity polymers with silicon oxide were examined with the aim of improving the properties of the transistors. The mobility and threshold voltage of a ZnO TFT with a poly(4-dimethylsilyl styrene) (Si-PS)/silicon oxide hybrid gate dielectric had values of 0.41 $cm^2/Vs$ and 24.4 V, and for polyimide/silicon oxide these values were 0.41 $cm^2/Vs$ and 24.4 V, respectively. The good hysteresis property was obtained with the dielectric of hydrophobicity. The solid output saturation behavior of ZnO TFTs was demonstrated with a $10^6$ on-off ratio.

Simulation Method of Temperature Dependent Threshold Voltage Shift in Metal Oxide Thin-film Transistors (온도에 의한 산화물 박막트랜지스터의 문턱전압 이동 시뮬레이션 방안)

  • Kwon, Seyong;Jung, Taeho
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.3
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    • pp.154-159
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    • 2015
  • In this paper, we propose a numerical method to model temperature dependent threshold voltage shift observed in metal oxide thin-film transistors (TFTs). The proposed model is then implemented in AIM-SPICE circuit simulation tool. The proposed method consists of modeling the well-known stretched-exponential time dependent threshold voltage shift and their temperature dependent coefficients. The outputs from AIM-SPICE tool and the stretched-exponential model at different temperatures in the literature are compared and they show a good agreement. Since metal oxide TFTs are the promising candidate for flat panel displays, the proposed method will be a good stepping stone to help enhance reliability of fast-evolving display circuits.

Light Effects on the Bias Stability of Transparent ZnO Thin Film Transistors

  • Shin, Jae-Heon;Lee, Ji-Su;Hwang, Chi-Sun;KoPark, Sang-Hee;Cheong, Woo-Seok;Ryu, Min-Ki;Byun, Chun-Won;Lee, Jeong-Ik;Chu, Hye-Yong
    • ETRI Journal
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    • v.31 no.1
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    • pp.62-64
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    • 2009
  • We report on the bias stability characteristics of transparent ZnO thin film transistors (TFTs) under visible light illumination. The transfer curve shows virtually no change under positive gate bias stress with light illumination, while it shows dramatic negative shifts under negative gate bias stress. The major mechanism of the bias stability under visible illumination of our ZnO TFTs is thought to be the charge trapping of photo-generated holes at the gate insulator and/or insulator/channel interface.