• Journal of Electrical Engineering and information Science
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• 제3권2호
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• pp.239-244
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• 1998

Piezoelectric pressure sensors and pyroelectric infrared detectors based on ZnO thin film have been integrated with GaAs metal-semiconductor field effect transistor (MESFET) amplifiers. Surface micromachining techniques have been applied in a GaAs MESFET process to form both microsensors and electronic circuits. The on-chip integration of microsensors such as pressure sensors and infrared detectors with GaAs integrated circuits is attractive because of the higher operating temperature up to 200 oC for GaAs devices compared to 125 oC for silicon devices and radiation hardness for infrared imaging applications. The microsensors incorporate a 1${\mu}$m-thick sputtered ZnO capacitor supported by a 2${\mu}$m-thick aluminum membrane formed on a semi-insulating GaAs substrate. The piezoelectric pressure sensor of an area 80${\times}$80 ${\mu}$m2 designed for use as a miniature microphone exhibits 2.99${\mu}$V/${\mu}$ bar sensitivity at 400Hz. The voltage responsivity and the detectivity of a single infrared detector of an area 80${\times}$80 $\mu\textrm{m}$2 is 700 V/W and 6${\times}$108cm$.$ Hz/W at 10Hz respectively, and the time constant of the sensor with the amplifying circuit is 53 ms. Circuits using 4${\mu}$m-gate GaAs MESFETs are fabricated in planar, direct ion-implanted process. The measured transconductance of a 4${\mu}$m-gate GaAs MESFET is 25.6 mS/mm and 12.4 mS/mm at 27 oC and 200oC, respectively. A differential amplifier whose voltage gain in 33.7 dB using 4${\mu}$m gate GaAs MESFETs is fabricated for high selectivity to the physical variable being sensed.

• 산업경영시스템학회지
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• 제40권1호
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• pp.114-123
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• 2017

The global small and mid-sized display market is changing from thin film transistor-liquid crystal display to organic light emitting diode (OLED). Reflecting these market conditions, the domestic and overseas display panel industry is making great effort to innovate OLED technology and incease productivity. However, current OLED production technology has not been able to satisfy the quality requirement levels by customers, as the market demand for OLED is becoming more and more diversified. In addition, as OLED panel production technology levels to satisfy customers' requirement become higher, product quality problems are persistently generated in OLED deposition process. These problems not only decrease the production yield but also cause a second problem of deteriorating productivity. Based on these observations, in this study, we suggest TRIZ-based improvement of defects caused by glass pixel position deformation, which is one of quality deterioration problems in small and medium OLED deposition process. Specifically, we derive various factors affecting the glass pixel position shift by using cause and effect diagram and identify radical reasons by using XY-matrix. As a result, it is confirmed that glass heat distortion due to the high temperature of the OLED deposition process is the most influential factor in the glass pixel position shift. In order to solve the identified factors, we analyzed the cause and mechanism of glass thermal deformation. We suggest an efficient method to minimize glass thermal deformation by applying the improvement plan of facilities using contradiction matrix in TRIZ. We show that the suggested method can decrease the glass temperature change by about 23% through an experiment.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2011년도 춘계학술발표대회
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• pp.3.2-3.2
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• 2011

In recent years, inkjet printing technology has received significant attention as a micro/nanofabrication technique for flexible printing of electronic circuits and solar cells, as well for biomaterial patterning. It eliminates the need for physical masks, causes fewer environment problems, lowers fabrication costs, and offers good layer-to-layer registration. To fulfill the requirements for use in the above applications, however, the inkjet system must meet certain criteria such as high frequency jetting, uniform droplet size, high density nozzle array, etc. Existing inkjet devices are either based on thermal bubbles or piezoelectric pumping; they have several drawbacks for flexible printing. For instance, thermal bubble jetting has limitations in terms of size and density of the nozzle array as well as the ejection frequency. Piezoelectric based devices suffer from poor pumping energy in addition to inadequate ejection frequency. Recently, an electrohydrodynamic (EHD) printing technique has been suggested and proposed as an alternative to thermal bubble or piezoelectric devices. In EHD jetting, a liquid (ink) is pumped through a nozzle and a strong electric field is applied between the nozzle and an extractor plate, which induce charges at the surfaces of the liquid meniscus. This electric field creates an electric stress that stretches the meniscus in the direction of the electric field. Once the electric field force is larger than the surface tension force, a liquid droplet is formed. An EHD inkjet head can produce droplets smaller than the size of the nozzle that produce them. Furthermore, the EHD nano-inkjet can eject high viscosity liquid through the nozzle forming tiny structures. These unique features distinguish EHD printing from conventional methods for sub-micron resolution printing. In this presentation, I will introduce the recent research results regarding the EHD nano-inkjet and the printing system, which has been applied to solar cell or thin film transistor applications.

• 한국전기전자재료학회논문지
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• 제24권1호
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• pp.12-16
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• 2011

In this study, we fabricated the flexible pentacene TFTs with the polymer gate dielectric and contact printing method by using the silver nano particle ink as a source/drain material on plastic substrate. In this experiment, to lower the cross-linking temperature of the PVP gate dielectric, UV-Ozone treatment has been used and the process temperature is lowered to $90^{\circ}C$ and the surface is optimized by various treatment to improve device characteristics. We tried various surface treatments; $O_2$ Plasma, hexamethyl-disilazane (HMDS) and octadecyltrichlorosilane (OTS) treatment methods of gate dielectric/semiconductor interface, which reduces trap states such as -OH group and grain boundary in order to improve the OTFTs properties. The optimized OTFT shows the device performance with field effect mobility, on/off current ratio, and the sub-threshold slope were extracted as $0.63cm^2 V^{-1}s^{-1}$, $1.7{\times}10^{-6}$, and of 0.75 V/decade, respectively.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제11권12호
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• pp.5998-6016
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• 2017

In thin-film transistor liquid-crystal displays (TFT-LCDs), which are most commonly used in mobile devices, the backlight accounts for about 70% of the power consumption. Therefore, most low-power-related studies focus on realizing power savings through backlight dimming. Image compensation is performed to mitigate the visual distortion caused by the backlight dimming. Therefore, popular techniques include pixel compensation for brightness recovery and contrast enhancement, such as histogram equalization. However, existing pixel compensation techniques often have limitations with respect to blur owing to the pixel saturation phenomenon, or because contrast enhancement cannot adequately satisfy the human visual system (HVS). To overcome these, in this study, we propose a novel dimming technique to achieve both power saving and HVS-awareness by combining the pixel compensation and histogram specifications, which convert the original cumulative density function (CDF) by designing and using the desired CDF of an image. Because the process of obtaining the desired CDF is customized to consider image characteristics, histogram specification is found to achieve better HVS-awareness than histogram equalization. For the experiments, we employ the LIVE image database, and we use the structural similarity (SSIM) index to measure the degree of visual satisfaction. The experimental results show that the proposed technique achieves up to 15.9% increase in the SSIM index compared with existing dimming techniques that use pixel compensation and histogram equalization in the case of the same low-power ratio. Further, the results indicate that it achieves improved HVS-awareness and increased power saving concurrently compared with previous techniques.

• 반도체디스플레이기술학회지
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• 제5권1호
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• pp.39-43
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• 2006

The polyvinyl series organic films as gate insulators of thin film transistor(TFT) have been processed and characterized on the polyether sulphone (PES) substrates . The poly-4-vinyl phenol(PVP) and polyvinyl toluene (PVT) were used as solutes and propylene glycol monomethyl ether acetate(PGMEA) as a solvent in the formation of organic insulators. The cross-linking of organic insulators was also attempted by adding the thermosetting material, poly (melamine-co-formaldehyde) as a hardener in the compound. The electrical characteristics measured in the metal-insulator-metal (MIM) structures showed that insulating properties of PVP layers were generally superior to those of PVT layers. Among the layers of PVP series; copolymer PVP(10 wt%), 5wt% cross-linked PVP(10 wt%), copolymer PVP(20 wt%), 5 wt% cross-linked PVP(20 wt%) and 10 wt% cross-linked PVP(20 wt%), the 10 wt% cross-linked PVP(20 wt%) layer showed the lowest leakage current of 1.2 pA at ${\pm}10V$. The ms value of surface roughness and the capcitance per unit area are 2.41 and $1.76nF/cm^2$ in the case of 10 wt% cross-linked PVP(20 wt%) layer, respectively.

• 센서학회지
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• 제29권4호
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• pp.266-269
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• 2020

In this study, we investigated the effect of a sulfur passivation (S-passivation) process step on the electrical properties of surface-channel In_0.7Ga_0.3As quantum-well (QW) metal-oxide-semiconductor field-effect transistors (MOSFETs) with S/D regrowth contacts. We fabricated long-channel In_0.7Ga_0.3As QW MOSFETs with and without (NH₄)₂S treatment and then deposited 1/4 nm of Al₂O₃/HfO₂ through atomic layer deposition. The devices with S-passivation exhibited lower values of subthreshold swing (74 mV/decade) and drain-induced barrier lowering (19 mV/V) than the devices without S-passivation. A conductance method was applied, and a low value of interface trap density D_it (2.83×10¹² cm^-2eV^-1) was obtained for the devices with S-passivation. Based on these results, interface traps between InGaAs and high-κ are other defect sources that need to be considered in future studies to improve III-V microsensor sensing platforms.

• 소성∙가공
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• 제14권3호
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• pp.282-290
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• 2005

Nowadays, TFT-LCD is widely used as display unit of many digital devices. And, the backlight unit(BLU) is used as a light source of TFT-LCD module. In the backlight unit, the most important component is a light guide, which guides the input light to the TFT-LCD module uniformly. Recently, many researchers have focused on improving the efficiency of BLU by changing the design and structure of a light guide. In the present paper, a series of simulation was performed to find the optimal luminance distribution of emanated light from the given geometry as the first step. From the results of simulations for the light guide with given V-groove pattern, the emanated light from it is mostly affected by the groove angle. In the case of acute angle, about 74 degrees was found as optimal angle to satisfy the restrictions of angular luminance distribution, FWHM, the maximum luminance, etc. However, as far as the average luminance value was concerned, the case of 120 degrees(abtuse angle) was found to be the best while prism films were added to the BLU. As a next step the light guide samples of 74 and 120 degrees were manufactured by DSF method, which was recently proposed by the authors. Of course, most of design parameters were chosen by the aid of simulation results. Finally, the results of average luminance values were compared between the simulation and DSF molded samples.

• 한국진공학회:학술대회논문집
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• 한국진공학회 1999년도 제17회 학술발표회 논문개요집
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• pp.66-66
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• 1999

최근 들어 다결정 SiGe은 MOS(Metal-Oxide-Semiconductor)에서 기존에 사용되던 다결정 Si 공정과의 호환성 및 여러 장점으로 인하여 다결정 Si 대안으로 많은 연구가 진행되고 있다. 고농도로 도핑된 P type의 다결정 SiGe은 Ge의 함량에 따른 일함수의 조절과 낮은 비저항으로 submicrometer CMOS 공정에서 게이트 전극으로 이용하려는 연구가 진행되고 있으며, 55$0^{\circ}C$ 이하의 낮은 온도에서도 증착이 가능하고, 도펀트의 활성화도가 높아서 TFT(Thin Film Transistor)에서도 유용한 재료로 검토되고 있다. 현재까지 다결정 SiGe의 증착은 MBE, APCVD, RECVD. HV/LPCVD 등 다양한 방법으로 이루어지고 있다. 이중 HV/LPCVD 방법을 이용한 증착은 반도체 공정에서 게이트 전극, 유전체, 금속화 공정 등 다양한 공정에서 사용되고 있는 방법으로 현재 사용되고 있는 반도체 공정과의 호환성의 장점으로 다결정 SiGe 게이트 전극의 증착 공정에 적합하다고 할 수 있다. 본 연구에서는 HV/LPCVD 방법을 이용하여 게이트 전극으로의 활용을 위한 다결정 SiGe의 증착 메카니즘을 분석하고 Ex-situ implantation 후 열처리에 따라 나타나는 활성화 정도를 분석하였다. 도펀트를 첨가하지 않은 다결정 SiGe을 주성엔지니어링의 EUREKA 2000 장비를 이용하여, 1000$\AA$의 열산화막이 덮혀있는 8 in 웨이퍼에 증착하였다. 증착 온도는 55$0^{\circ}C$에서 6$25^{\circ}C$까지 변화를 주었으며, 증착압력은 1mtorr-4mtorr로 유지하였다. 낮은 증착압력으로 인한 증착속도의 감소를 방지하기 위하여 Si source로서 Si2H6를 사용하였으며, Ge의 Source는 수소로 희석된 10% GeH4와 100% GeH4를 사용하였다. 증착된 다결정 SiGe의 Ge 함량은 RBS, XPS로 분석하였으며, 증착된 박막의 두께는 Nanospec과 SEM으로 관찰하였다. 또한 Ge 함량 변화에 따른 morphology 관찰과 변화 관찰을 위하여 AFM, SEM, XRD를 이용하였으며, 이온주입후 열처리 온도에 따른 활성화 정도의 관찰을 위하여 4-point probe와 Hall measurement를 이용하였다. 증착된 다결정 SiGe의 두게를 nanospec과 SEM으로 분석한 결과 Gem이 함량이 적을 때는 높은 온도에서의 증착이 더 빠른 증착속도를 나타내었지만, Ge의 함량이 30% 되었을 때는 온도에 관계없이 일정한 것으로 나타났다. XRD 분석을 한 결과 Peak의 위치가 순수한 Si과 순수한 Ge 사이에 존재하는 것으로 나타났으며, ge 함량이 많아짐에 따라 순수한 Ge쪽으로 옮겨가는 경향을 보였다. SEM, ASFM으로 증착한 다결정 SiGe의 morphology 관찰결과 Ge 함량이 높은 박막의 입계가 다결정 Si의 입계에 비해 훨씬 큰 것으로 나타났으며 근 값도 증가하는 것으로 나타났다.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2008년도 추계종합학술대회 B
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• pp.592-595
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• 2008

본 논문은 모바일 TFT-LCD 구동 집 회로와 임베디드 소프트웨어를 이용한 자동 화질 레지스터 최적화시스템을 제안한다. 이러한 시스템은 LCD모듈의 중요한 화질 평가 요소인 평균 감마 오차, 감마 조정 시간, 플리커 잡음 및 명암비 등을 최적화하기 위해 모바일 LCD구동 집적회로 내의 감마조정 레지스터들과 전압 설정 레지스터 들을 자동적으로 제어한다. 개발된 알고리즘과 임베디드 소프트웨어는 거의 모든 유형의 LCD모듈에 적용 가능하다. 개발된 화질 최적화 시스템은 측정 대상이 되는 모듈 (MUT, LCD 모듈), 제어 프로그램, 휘도 측정용 멀티미디어 디스플레이 측정기 및 인터페이스용 제어 보드로 구성되어 있다. 제어 보드는 DSP와 FPGA로 구성 되 어 있고, RGB 및 CPU 인터페이스를 지원한다.