• Title/Summary/Keyword: thickness optimization

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Optimization of Culture Condition of Gluconacetobacter hansenii TF-2 for Cellulose Gel Production (Gluconacetobacter hansenii TF-2를 이용한 감귤과즙으로부터의 셀루로스 겔 생산의 최적화)

  • 최경호;정지숙;문철호;김미림
    • Journal of the Korean Society of Food Science and Nutrition
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    • v.33 no.1
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    • pp.176-181
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    • 2004
  • Gluconacetobacter hansenii TF-2, an isolate from black tea fungus, was statically cultivated to ferment cellulose gel from citrus juice. The juice prepared by press filtering of peeled citrus fruit contained 135.5 mg of total sugar/mL, 1.23% of total acid, and average pH of the juice was 3.98. The bacterium produced cellulose gel optimally on the surface of culture broth containing 17% of citrus juice and 10$^{\circ}$Brix of total sugar. The optimum temperature was 3$0^{\circ}C$ for producing acetic acid and gel formation. The bacterium could not produce acetic acid on gel formation at 4$0^{\circ}C$. The optimum pH was 3.0∼4.0 but was not significantly different between pH 3.0∼4.0. The cultivation for 18 days under optimal conditions produced gel as 14.2$\pm$0.6 mm of thickness and acids equivalent to 1.90$\pm$0.22% of acetic acid. The pH of culture broth was stabilized at 2.6∼2.8 during the cultivation. Remaining sugar content was 27.1$\pm$4.2 mg/mL of total sugar and 6.9 mg/mL of reducing sugar. The gel productivity was 137.8$\pm$9.7 g/L.

Deposition Optimization and Bonding Strength of AuSn Solder Film (AuSn 솔더 박막의 스퍼터 증착 최적화와 접합강도에 관한 연구)

  • Kim, D.J.;Lee, T.Y.;Lee, H.K.;Kim, G.N.;Lee, J.W.
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.2 s.43
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    • pp.49-57
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    • 2007
  • Au-Sn solder alloy were deposited in multilayer and co-sputtered film by rf-magnetron sputter and the composition control and analysis were studied. For the alloy deposition condition, each components of Au or Sn were deposited separately. On the basis of pure Sn and Au deposition, the deposition condition for Au-Sn solder alloy were set up. As variables, the substrate temperature, the rf-power, and the thickness ratio were used for the optimum composition. For multilayer solder alloy, the roughness and the composition of solder alloy were controlled more accurately at the higher substrate temperature. In contrast, for co-sputtered solder, the substrate temperature influenced little to the composition, but the composition could be controlled easily by rf-power. In addition, the co-sputtered solder film mostly consisted of intermetallic compound, which formed during deposition. The compound were confirmed by XRD. Without flux during bonding of solder alloy film on leadframe, the adhesion strength were measured. The maximum shear stress was $330(N/mm^2)$ for multilayer solder with Au 10wt% and $460(N/mm^2)$ for co-sputtered solder with Au 5wt%.

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Numerical Analysis of Warpage and Reliability of Fan-out Wafer Level Package (수치해석을 이용한 팬 아웃 웨이퍼 레벨 패키지의 휨 경향 및 신뢰성 연구)

  • Lee, Mi Kyoung;Jeoung, Jin Wook;Ock, Jin Young;Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
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    • v.21 no.1
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    • pp.31-39
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    • 2014
  • For mobile application, semiconductor packages are increasingly moving toward high density, miniaturization, lighter and multi-functions. Typical wafer level packages (WLP) is fan-in design, it can not meet high I/O requirement. The fan-out wafer level packages (FOWLPs) with reconfiguration technology have recently emerged as a new WLP technology. In FOWLP, warpage is one of the most critical issues since the thickness of FOWLP is thinner than traditional IC package and warpage of WLP is much larger than the die level package. Warpage affects the throughput and yield of the next manufacturing process as well as wafer handling and fabrication processability. In this study, we investigated the characteristics of warpage and main parameters which affect the warpage deformation of FOWLP using the finite element numerical simulation. In order to minimize the warpage, the characteristics of warpage for various epoxy mold compounds (EMCs) and carrier materials are investigated, and DOE optimization is also performed. In particular, warpage after EMC molding and after carrier detachment process were analyzed respectively. The simulation results indicate that the most influential factor on warpage is CTE of EMC after molding process. EMC material of low CTE and high Tg (glass transition temperature) will reduce the warpage. For carrier material, Alloy42 shows the lowest warpage. Therefore, considering the cost, oxidation and thermal conductivity, Alloy42 or SUS304 is recommend for a carrier material.

Optimization of Electro-Optical Properties of Acrylate-based Polymer-Dispersed Liquid Crystals for use in Transparent Conductive ZITO/Ag/ZITO Multilayer Films (투명 전도성 ZITO/Ag/ZITO 다층막 필름 적용을 위한 아크릴레이트 기반 고분자분산액정의 전기광학적 특성 최적화)

  • Cho, Jung-Dae;Kim, Yang-Bae;Heo, Gi-Seok;Kim, Eun-Mi;Hong, Jin-Who
    • Applied Chemistry for Engineering
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    • v.31 no.3
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    • pp.291-298
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    • 2020
  • ZITO/Ag/ZITO multilayer transparent electrodes at room temperature on glass substrates were prepared using RF/DC magnetron sputtering. Transparent conductive films with a sheet resistance of 9.4 Ω/㎡ and a transmittance of 83.2% at 550 nm were obtained for the multilayer structure comprising ZITO/Ag/ZITO (100/8/42 nm). The sheet resistance and transmittance of ZITO/Ag/ZITO multilayer films meant that they would be highly applicable for use in polymer-dispersed liquid crystal (PDLC)-based smart windows due to the ability to effectively block infrared rays (heat rays) and thereby act as an energy-saving smart glass. Effects of the thickness of the PDLC layer and the intensity of ultraviolet light (UV) on electro-optical properties, photopolymerization kinetics, and morphologies of difunctional urethane acrylate-based PDLC systems were investigated using new transparent conducting electrodes. A PDLC cell photo-cured using UV at an intensity of 2.0 mW/c㎡ with a 15 ㎛-thick PDLC layer showed outstanding off-state opacity, good on-state transmittance, and favorable driving voltage. Also, the PDLC-based smart window optimized in this study formed liquid crystal droplets with a favorable microstructure, having an average size range of 2~5 ㎛ for scattering light efficiently, which could contribute to its superior final performance.

The Optimization of $0.5{\mu}m$ SONOS Flash Memory with Polycrystalline Silicon Thin Film Transistor (다결정 실리콘 박막 트랜지스터를 이용한 $0.5{\mu}m$ 급 SONOS 플래시 메모리 소자의 개발 및 최적화)

  • Kim, Sang Wan;Seo, Chang-Su;Park, Yu-Kyung;Jee, Sang-Yeop;Kim, Yun-Bin;Jung, Suk-Jin;Jeong, Min-Kyu;Lee, Jong-Ho;Shin, Hyungcheol;Park, Byung-Gook;Hwang, Cheol Seong
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.10
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    • pp.111-121
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    • 2012
  • In this paper, a poly-Si thin film transistor with ${\sim}0.5{\mu}m$ gate length was fabricated and its electrical characteristics are optimized. From the results, it was verified that making active region with larger grain size using low temperature annealing is an efficient way to enhance the subthreshold swing, drain-induced barrier lowering and on-current characteristics. A SONOS flash memory was fabricated using this poly-Si channel process and its performances are analyzed. It was necessary to optimize O/N/O thickness for the reduction of electron back tunneling and the enhancement of its memory operation. The optimized device showed 2.24 V of threshold voltage memory windows which coincided with a well operating flash memory.

A Study on the Performance Improvement of ta-C Thin Films Coating on Tungsten Carbide(WC) Surface for Aspherical Glass Lens by FCVA Method Compared with Ir-Re coating (Ir-RE 코팅 대비 자장여과필터방식을 이용한 비구면 유리 렌즈용 초경합금(WC)표면의 ta-C 박막 코팅 성능 개선 연구)

  • Jung, Kyung-Seo;Kim, Seung-Hee
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.20 no.12
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    • pp.27-36
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    • 2019
  • The demand for a low dispersion lens with a small refractive index and a high refractive index is increasing, and accordingly, there is an increasing need for a releasable protective film with high heat resistance and abrasion resistance. On the other hand, the optical industry has not yet established a clear standard for the manufacturing process and quality standards for mold-releasing protective films used in aspheric glass lens molding. Optical lens manufacturers treat this technology as proprietary information. In this study, an experiment was conducted regarding the optimization of ion etching, magnetron, and arc current at each source and filter part, and bias voltage in FCVA (filtered cathode vacuum arc)-based Ta-C thin film coatings. This study found that compared to iridium-rhenium alloy thin film sputtering products, the coating conditions were improved by approximately 50%, 20%, and 40% in terms of thickness, hardness, and adhesive strength of the film, respectively. The thin-film coating process proposed in this study is expected to contribute significantly to the development and utilization of glass lenses, which will help enhance the minimum mechanical properties and quality of the mold-release thin film layer required for glass mold surface forming technology.

A Numerical Study on the Optimization of Urea Solution Injection to Maximize Conversion Efficiency of NH3 (NH3 전환효율 극대화를 위한 Urea 인젝터의 분사 최적화에 관한 수치적 연구)

  • Moon, Seongjoon;Jo, Nakwon;Oh, Sedoo;Jeong, Soojin;Park, Kyoungwoo
    • Transactions of the Korean Society of Automotive Engineers
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    • v.22 no.3
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    • pp.171-178
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    • 2014
  • From now on, in order to meet more stringer diesel emission standard, diesel vehicle should be equipped with emission after-treatment devices as NOx reduction catalyst and particulate filters. Urea-SCR is being developed as the most efficient method of reducing NOx emissions in the after-treatment devices of diesel engines, and recent studies have begun to mount the urea-SCR device for diesel passenger cars and light duty vehicles. That is because their operational characteristics are quite different from heavy duty vehicles, urea solution injection should be changed with other conditions. Therefore, the number and diameter of the nozzle, injection directions, mounting positions in front of the catalytic converter are important design factors. In this study, major design parameters concerning urea solution injection in front of SCR are optimized by using a CFD analysis and Taguchi method. The computational prediction of internal flow and spray characteristics in front of SCR was carried out by using STAR-CCM+7.06 code that used to evaluate $NH_3$ uniformity index($NH_3$ UI). The design parameters are optimized by using the $L_{16}$ orthogonal array and small-the-better characteristics of the Taguchi method. As a result, the optimal values are confirmed to be valid in 95% confidence and 5% significance level through analysis of variance(ANOVA). The compared maximize $NH_3$ UI and activation time($NH_3$ UI 0.82) are numerically confirmed that the optimal model provides better conversion efficiency of $NH_3$. In addition, we propose a method to minimize wall-wetting around the urea injector in order to prevent injector blocks caused by solid urea loading. Consequently, the thickness reduction of fluid film in front of mixer is numerically confirmed through the mounting mixer and correcting injection direction by using the trial and error method.

Optimization of Processing Conditions and Selection of Optimum Species for Sweet Potato Chips (품종별 고구마 칩의 제조 조건 최적화 및 최적 품종 선정)

  • Jang, Gwi-Yeong;Li, Meishan;Lee, Sang-Hoon;Woo, Koan-Sik;Sin, Hyun-Man;Kim, Hong-Sig;Lee, Jun-Soo;Jeong, Heon-Sang
    • The Korean Journal of Food And Nutrition
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    • v.26 no.3
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    • pp.565-572
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    • 2013
  • This study was performed to optimize the processing conditions and to select the optimum species for colored sweet potato chips (Shinjami, Juhwangmi and Hayanmi varieties) baked by far-infrared radiation. Sweet potato chips were prepared by different slicing thickness (1~3 mm), concentration of sucrose solution for soaking (15~30%), blanching time (15~60 sec), baking temperature ($110{\sim}140^{\circ}C$) and baking time (23~31 min) through sensory evaluation and failure stress measurement. Optimal processing condition of sweet potato chips using Shinjami was determined to 1 mm, 20%, 45 sec, $120^{\circ}C$ and 31 min, and those using Juhwangmi was determined as 1 mm, 25%, 45 sec, $130^{\circ}C$ and 29 min. Sweet potato chips using Hayanmi was determined as 1 mm, 20%, 45 sec, $120^{\circ}C$ and 31 min, respectively. Free sugar content of sweet potato chips was higher in chips than in raw materials. In the sensory evaluation, appearance, sweet taste, hardness, and overall acceptance were higher in Juhwangmi than in the Shinjami and Hayanmi varieties. Overall acceptance, sugar content, b-value and failure stress were highly correlated among factors affecting the sensory characteristics (p<0.01). From the results of this study, Juhwangmi variety was selected for production of sweet potato chips.

Analysis on Adhesion Properties of Composite Electrodes for Lithium Secondary Batteries using SAICAS (SAICAS를 이용한 리튬이차전지용 복합전극 결착특성 분석)

  • Byun, Seoungwoo;Roh, Youngjoon;Jin, Dahee;Ryou, Myung-Hyun;Lee, Yong Min
    • Journal of the Korean Electrochemical Society
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    • v.21 no.2
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    • pp.28-38
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    • 2018
  • Although the adhesion properties of composite electrodes are important for securing long-term reliability and realizing high energy density of lithium secondary batteries, related research has not been carried out extensively due to the limitation of measurement technology. However, surface and interfacial cutting analysis system(SAICAS), which can measure the adhesion properties while cutting and peeling a coating layer of $1{\sim}1000{\mu}m$ thickness, has been developed and applied for analyzing the adhesion properties of composite electrodes for lithium secondary batteries. Thus, this review presents not only the principle and measurement method of SAICAS but also comparison results between SAICAS and conventional peel test. In addition, application examples of SAICAS are introduced in the study of electrode design optimization, new binder derivation study, and binder distribution in composite electrode. This suggests that SAICAS is an analytical method that can be easily applied to investigate the adhesion properties of composite electrodes for lithium secondary batteries.

Optically Controlled Silicon MESFET Modeling Considering Diffusion Process

  • Chattopadhyay, S.N.;Motoyama, N.;Rudra, A.;Sharma, A.;Sriram, S.;Overton, C.B.;Pandey, P.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.3
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    • pp.196-208
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    • 2007
  • An analytical model is proposed for an optically controlled Metal Semiconductor Field Effect Transistor (MESFET), known as Optical Field Effect Transistor (OPFET) considering the diffusion fabrication process. The electrical parameters such as threshold voltage, drain-source current, gate capacitances and switching response have been determined for the dark and various illuminated conditions. The Photovoltaic effect due to photogenerated carriers under illumination is shown to modulate the channel cross-section, which in turn significantly changes the threshold voltage, drainsource current, the gate capacitances and the device switching speed. The threshold voltage $V_T$ is reduced under optical illumination condition, which leads the device to change the device property from enhancement mode to depletion mode depending on photon impurity flux density. The resulting I-V characteristics show that the drain-source current IDS for different gate-source voltage $V_{gs}$ is significantly increased with optical illumination for photon flux densities of ${\Phi}=10^{15}\;and\;10^{17}/cm^2s$ compared to the dark condition. Further more, the drain-source current as a function of drain-source voltage $V_{DS}$ is evaluated to find the I-V characteristics for various pinch-off voltages $V_P$ for optimization of impurity flux density $Q_{Diff}$ by diffusion process. The resulting I-V characteristics also show that the diffusion process introduces less process-induced damage compared to ion implantation, which suffers from current reduction due to a large number of defects introduced by the ion implantation process. Further the results show significant increase in gate-source capacitance $C_{gs}$ and gate-drain capacitance $C_{gd}$ for optical illuminations, where the photo-induced voltage has a significant role on gate capacitances. The switching time ${\tau}$ of the OPFET device is computed for dark and illumination conditions. The switching time ${\tau}$ is greatly reduced by optical illumination and is also a function of device active layer thickness and corresponding impurity flux density $Q_{Diff}$. Thus it is shown that the diffusion process shows great potential for improvement of optoelectronic devices in quantum efficiency and other performance areas.