• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.398-398
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• 2007

Most recently, the Liquid Crystal (LC) aligning capabilities achieved by ion beam exposure on the diamond-like carbon (DLC) thin film layer have been successfully studied. The DLC thin films have a high mechanical hardness, a high electrical resistance, optical transparency and chemical inertness. Nitrogen doped Diamond Like Carbon (NDLC) thin films exhibit properties similar to those of the DLC films and better thermal stability than the DLC films because C:N bonding in the NDLC film is stronger against thermal stress than C:H bonding in the DLC thin films. Moreover, our research group has already studied ion beam alignment method using the NDLC thin films. The nematic liquid crystal (NLC) alignment effects treated on the SiNx thin film layers using ion beam irradiation for three kinds of N rations was successfully studied for the first time. The SiNx thin film was deposited by plasma-enhanced chemical vapor deposition (PECVD) and used three kinds of N rations. In order to characterize the films, the atomic force microscopy (AFM) image was observed. The good LC aligning capabilities treated on the SiNx thin film with ion beam exposure for all N rations can be achieved. The low pretilt angles for a NLC treated on the SiNx thin film with ion beam irradiation were measure.

• Current Photovoltaic Research
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• v.10 no.2
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• pp.33-38
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• 2022

Planner configuration thin film solar cells (TFSCs) with SnS/CdS heterojunction performed a lower short-circuit current (J_SC). In this study, we have demonstrated a path to overcome deficiency in J_SC by the incorporation of Se in the SnS absorber. We carried out the incorporation of Se in VTD grown SnS absorber by rapid thermal annealing (RTA). The diffusion of Se is mostly governed by RTA temperature (T_RTA), also it is observed that film structure changes from cube-like to plate-like structure with T_RTA. The maximum J_SC of 23.1 mA cm^-2 was observed for 400℃ with an open-circuit voltage (V_OC) of 0.140 V for the same temperature. The highest performance of 2.21% with J_SC of 18.6 mA cm^-2, V_OC of 0.290 V, and fill factor (FF) of 40.9% is observed for a T_RTA of 300℃. In the end, we compare the device performance of Se- incorporated SnS absorber with pristine SnS absorber material, increment in J_SC is approximately 80% while a loss in V_OC of about 20% has been observed.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.39 no.10
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• pp.825-829
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• 2015

Theoretical calculations suggest that the thermoelectric figure of merit (ZT) can be improved by introducing a core-shell heterostructure to a semiconductor nanowire because of the reduced thermal conductivity of the nanowire. To experimentally verify the decrease in thermal conductivity in core-shell nanowires, the thermal conductivity of Ge-SixGe1-x core-shell nanowires grown by chemical vapor deposition (CVD) was measured using suspended microdevices. The silicon composition (Xsi) in the shells was measured to be about 0.65, and the remainder of the germanium in the shells was shown to play a role in decreasing defects originating from the lattice mismatch between the cores and shells. In addition to the standard four-point current- voltage (I-V) measurement, the measurement configuration based on the Wheatstone bridge was attempted to enhance the measurement sensitivity. The measured thermal conductivity values are in the range of 9-13 W/mK at room temperature and are lower by approximately 30 than that of a germanium nanowire with a comparable diameter.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.186-186
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• 2000

After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.10
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• pp.1-7
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• 2018

Tin dioxide, $SnO_2$, is applied as an anode material in Li-ion batteries and a gas sensing materials, which shows changes in resistance in the presence of gas molecules, such as $H_2$, NO, $NO_2$ etc. Considerable research has been done on the synthesis of $SnO_2$ nanostructures. Nanomaterials exhibit a high surface to volume ratio, which means it has an advantage in sensing gas molecules and improving the specific capacity of Li-ion batteries. In this study, $SnO_2$ nanostructures were grown on a Si substrate using a thermal CVD process with the vapor transport method. The carrier gas was mixed with high purity Ar gas and oxygen gas. The crystalline phase of the as-grown tin oxide nanostructures was affected by the oxygen gas flow rate. The crystallographic property of the as-grown tin oxide nanostructures were investigated by Raman spectroscopy and XRD. The morphology of the as-grown tin oxide nanostructures was confirmed by scanning electron microscopy. As a result, the $SnO_2$ nanostructures were grown directly on Si wafers with moderate thickness and a nanodot surface morphology for a carrier gas mixture ratio of Ar gas 1000 SCCM : $O_2$ gas 10 SCCM.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.1
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• pp.699-704
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• 2018

One-dimensional nanostructures have attracted increasing attention because of their unique electronic, optical, optoelectrical, and electrochemical properties on account of their large surface-to-volume ratio and quantum confinement effect. Vertically grown nanowires have a large surface-to-volume ratio. The vapor-liquid-solid (VLS) process has attracted considerable attention for its self-alignment capability during the growth of nanostructures. In this study, vertically aligned silicon oxide nano-pillars were grown on Si\$SiO_2$(300 nm)\Pt substrates using two-zone thermal chemical vapor deposition system via the VLS process. The morphology and crystallographic properties of the grown silicon oxide nano-pillars were investigated by field emission scanning electron microscopy and transmission electron microscopy. The diameter and length of the grown silicon oxide nano-pillars were found to be dependent on the catalyst films. The body of the silicon oxide nano-pillars exhibited an amorphous phase, which is consisted with Si and O. The head of the silicon oxide nano-pillars was a crystalline phase, which is consisted with Si, O, Pt, and Ti. The vertical alignment of the silicon oxide nano-pillars was attributed to the preferred crystalline orientation of the catalyst Pt/Ti alloy. The vertically aligned silicon oxide nano-pillars are expected to be applied as a functional nano-material.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.4
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• pp.458-463
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• 2019

Palladium (Pd) is widely used as a catalyst and noxious gas sensing materials. Especially, various researches of Pd based hydrogen gas sensor have been studied due to the noble property, Pd can be adsorbed hydrogen up to 900 times its own volume. In this study, palladium oxide (PdO) nanostructures were grown on Si substrate ($SiO_2(300nm)/Si$) for 3 to 5 hours at $230^{\circ}C{\sim}440^{\circ}C$ using thermal chemical vapor deposition system. Pd powder (source material) was vaporized at $950^{\circ}C$ and high purity Ar gas (carrier gas) was flown with the 200 sccm. The surface morphology of as-grown PdO nanostructures were characterized by field-emission scanning electron microscopy(FE-SEM). The crystallographic properties were confirmed by Raman spectroscopy. As the results, the as-grown nanostructures exhibit PdO phase. The nano-cube structures of PdO were synthesized at specific substrate temperatures and specific growth duration. Especially, PdO nano-cube structrures were uniformly grown at $370^{\circ}C$ for growth duration of 5 hours. The PdO nano-cube structures are attributed to vapor-liquid-solid process. The nano-cube structures of PdO on graphene nanosheet can be applied to fabricate of high sensitivity hydrogen gas sensor.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.4
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• pp.202-208
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• 2001

In Recent results suggested that doping $Ta_2O_5$ with a small amount of $TiO_2$ using standard ceramic processing techniques can increase the dielectric constant of $Ta_2O_5$ significantly. In this paper, this concept is studied using RTCVD (Rapid Thermal Chemical Vapor Deposition). Ti-doped $Ta_2O_5$ films are deposited using $TaC_{12}H_{30}O_5N$, $C_8H_{24}N_4Ti$, and $O_2$ on both Si and $NH_3$-nitrided Si substrates. An $NH_3$-based interface layer at the Si surface is used to prevent interfacial oxidation during the CVD process and post deposition annealing is performed in $H_2/O_2$ ambient to improve film quality and reduce leakage current. A sputtered TiN layer is used as a diffusion barrier between the Al gate electrode and the $TaTi_xO_y$ dielectric. XPS analyses confirm the formation of a ($Ta_2O_5)_{1-x}(TiO_2)_x$ composite oxide. A high quality $TaTi_xO_y$ gate stack with EOT (Equivalent Oxide Thickness) of $7{\AA}$ and leakage current $Jg=O.5A/textrm{cm}^2$ @ Vg=-1.0V has been achieved. We have also succeeded in forming a $TaTi_x/O_y$ composite oxide by rapid thermal oxidation of the as-deposited CVD TaTi films. The electrical properties and Jg-EOT characteristics of these composite oxides are remarkably similar to that of RTCVD $Ta_2O_5, suggesting that the dielectric constant of $Ta_2O_5$ is not affected by the addition of $TiO_2$.

• Journal of IKEEE
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• v.20 no.4
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• pp.337-343
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• 2016

This study conducted the gamma ray spectroscopic analysis of the microcolumnar CsI:Tl deposited onto the SiPMs using thermal evaporation deposition. The SEM measured thickness of microcolumnar CsI:Tl and of its individual columns. From the SEM observation, the measured thickness of CsI:Tl were $450{\mu}m$ and $600{\mu}m$. The gamma ray spectroscopic properties of microcolumnar CsI:Tl, $450{\mu}m$ and $600{\mu}m$ thick deposited onto the SiPMs were analyzed using standard gamma ray sources $^{133}Ba$ and $^{137}Cs$. The spectroscopic analysis of microcolumnar CsI:Tl deposited onto the SiPMs included the measurements of response linearity over the $^{137}Cs$ gamma ray intensity; and gamma ray energy spectrum. Furthermore from the gamma ray spectrum measurement of $^{133}Ba$ and $^{137}Cs$, $450{\mu}m$ thick CsI:Tl showed good efficiency when measured with $^{133}Ba$ and $600{\mu}m$ thick CsI:Tl was highly efficient when measured with $^{137}Cs$.

• Journal of the Korean Vacuum Society
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• v.17 no.3
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• pp.195-198
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• 2008

In this paper, it was demonstrated that organic thin-film transistors (OTFTs) were fabricated with the organic passivation layer by vapor deposition polymerization (VDP) processing. In order to form polymeric film as a passivation layer, VDP process was also introduced instead of spin-coating process, where polymeric film was co-deposited by high-vacuum thermal evaporation from 6FDA and ODA followed by curing. In order to investigate by compared with different passivation layer, the other OTFTs is fabricated to passivation by Polyvinylalcohol using spincoating. We can see that two different ways of passivation layer affect electric characteristic of OTFTs. The initial electric characteristic of OTFTs before passivation such as field effect mobility, threshold voltage, and on-off current ratio are $0.24cm^2/Vs$, -3V, and $10^6$, respectively. Then after polyimide passivation layer, field effect mobility change from $0.24cm^2/Vs$ to $0.26cm^2/Vs$, threshold voltage from -3V to 1V and on-off current ratio from $10^6$ to $10^6$, respectively. In the case of polyvinylalcohol passivation, the initial electric characteristic of OTFTs before passivation such as field effect mobility, threshold voltage, and on-off current ratio are $0.13cm^2/Vs$, 0V, and $10^6$, respectively. Then after polyvinylalcohol passivation layer, field effect mobility changes from $0.13cm^2/Vs$ to $0.13cm^2/Vs$, threshold voltage from 0V to 2V, and on-off current ratio from $10^6$ to $10^5$, respectively.