• Title/Summary/Keyword: test circuit

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Short Circuit Tests of the Three-Phase DC Reactor Type Fault Current Limiter in Changing of Turns Ratio of Transformers (변압기 권선비의 변화에 따른 3상 DC 리액터형태 한류기의 단락실험)

  • Lee, Eung-Ro;Lee, Chan-Ju;Lee, Seung-Je;Go, Tae-Guk;Hyeon, Ok-Bae
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.51 no.6
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    • pp.267-272
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    • 2002
  • This Paper deals with the short circuit tests of the three-Phase DC reactor type fault current limiter (FCL) in changing of turns ratio of transformers. The experiment of this paper is a preliminary step to develop the FCL's faculties for an application to high voltage transmission line. So, superconducting coil was made of Nb-Ti, low temperature superconductor, and the ratings of the power system of experimental circuit are 400V/7A class. A three-phase DC reactor type FCL consists of three transformers, six diodes, one superconducting coil and one cryostat. The important point of experimental analysis is transient period, the operating lagging time of circuit breaker. As the results of the experiment, the values are referred to the limitation rate about 77% and 90% when the turns ratio of transformer was 1:1 and 2:1 respectively.

DESIGN OF A RISE TIME DISCRIMINATION CIRCUIT FOR X-RAY PROPORTIONAL COUNTER (X-선 비례계수관용 상승시간 선별회로 제작)

  • 남욱원;최철성
    • Journal of Astronomy and Space Sciences
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    • v.12 no.1
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    • pp.66-77
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    • 1995
  • It is possible to distinguish X-ray events from non X-ray events in proportional conters using the method of rise time discrimination (RTD). In order to subtract non X-ray background, we have developed a simple RTD circuit which will be applied to the proportional counter planned for a sounding rocket experiment. The entire circuit consists of two parts ; the rise time measurement circuit and the time to amplitude conversion circuit which includes the self-calibration mode. From the test with X-ray detecting system, we obtained that the background can be rejected more than 80% in the energy band 2∼12 keV. However we confirmed that the RDT method is not proper to be used for the energy range above 12kV.

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A Study on the Improvement of Easy Elevator Equipment (간이용 엘리베이터 장치 개선에 관한 연구)

  • Wee, Sung-Dong;Gu, Hal-Bon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.09a
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    • pp.82-88
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    • 2001
  • Manufactured easy elevator can drives from the first floor to fifth floor as sequence control circuit in cause opening than existing equipment of experiment and practice, the structure of in the first implementation process are hand-worked control component with push-button, L/S and relay, it is structured a lamp to express that the door open and moving of cage by mechanical action of For/Rev motor-braker of which load. The second structure of implement process to control from the first floor to the fifth floor with the PLC elevator program can control by the sensor of hand-operated function of L/Sl~L/S5 in time that the S/Wl~S/W5 of PLC control panel operates to the For/Rev. The function of two kind process that an elevator is driven by PLC program and the sequence control relay circuit is a mechanical relay sequence control field and it is equipment apparatus of it to get appropriately the technology of For/Rev in that mechanical operating cause of a load using the PLC program. Also the wring circuit using a plug, dissembly. the circuit and the principle of component, and PLC program with the function test can be used the implementation field to the total technology theory about FA.

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Analysis of the electrostatic induction voltage and electromagnetic induction current on the Parallel Circuit in 765kV Double Circuit Transmission Line (765kV 2회선 송전선로를 765kV 및 345kV로 병행운전시 유도현상 예측)

  • Woo, J.W.;Shim, E.B.;Kwak, J.S.;Jeon, M.R.;Kim, K.I.;Kim, T.O.
    • Proceedings of the KIEE Conference
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    • 2002.07a
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    • pp.169-171
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    • 2002
  • The western route of KEPCO's 765kV transmission line has been tentatively operating as 345kV voltage before commercial operation. After finishing the test operation of 765kV substation in 2002. KEPCO decided to operate the 765kV line for commercial operation. During the applying of 765kV voltage to the transmission line, double circuit transmission line will be operated with two voltage grades of 765kV and 345kV. Because the earthing switch is installed on both end of transmission line, we had estimated the electrostatic induction voltage and electromagnetic induction current before the line energizing in order to confirm the ratings of earthing switch. The induced voltage and current is very important for the maintenance of parallel circuit. This paper describes the simulation study of electrical phenomena such as electrostatic induction voltage from the parallel line and electromagnetic induction current from the parallel circuit. The transmission line model was developed by EMTP (Electro-Magnetic Transient Program).

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Short-circuit Analysis by the Application of Control Signal of Power Converter to the Inductive Fault Current Limiter

  • Ahn, Min-Cheol;Hyoungku Kang;Bae, Duck-Kweon;Minseok Joo;Park, Dong-Keun;Lee, Sang-Jin;Ko, Tae-Kuk
    • Progress in Superconductivity and Cryogenics
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    • v.6 no.2
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    • pp.25-28
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    • 2004
  • Three-phase inductive superconducting fault current limiter (SFCL) with DC reactor rated on 6.6 $KV_{rms}/200 A_{rms}$ has been developed in Korea. This system consists of one DC reactor, AC/DC power converter, and a three-phase transformer, which is called magnetic core reactor (MCR). This paper deals with the short-circuit analysis of the SFCL. The DC reactor was the HTS solenoid coil whose inductance was 84mH. The power converter was performed as the dual-mode operation for dividing voltage between the rectifying devices. The short-term normal operation (1 see) and short-circuit tests (2∼3 cycles) of this SFCL were performed successfully. In regular short-circuit test, the fault current was limited as 30% of rated short-circuit current at 2 cycles after the fault. The experimental results have a very similar tendency to the simulation results. Using the technique for the fault detection and SCR firing control, the fault current limiting rate of the SFCL was improved. From this research, the parameters for design and manufacture of large-scale SFCL were obtained.

High Performance Charge Pump Converter with Integrated CMOS Feedback Circuit

  • Jeong, Hye-Im;Park, Jung-Woong;Choi, Ho-Yong;Kim, Nam-Soo
    • Transactions on Electrical and Electronic Materials
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    • v.15 no.3
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    • pp.139-143
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    • 2014
  • In this paper, an integrated low-voltage control circuit is introduced for a charge pump DC-DC boost converter. By exploiting the advantage of the integration of the feedback control circuit within CMOS technology, the charge pump boost converter offers a low-current operation with small ripple voltage. The error amplifier, comparator, and oscillator in the control circuit are designed with the supply voltage of 3.3 V and the operating frequency of 1.6~5.5 MHz. The charge pump converter with the 4 or 8 pump stages is measured in simulation. The test in the $0.35{\mu}m$ CMOS process shows that the load current and ripple ratio are controlled under 1 mA and 2% respectively. The output-voltage is obtained from 4.8 ~ 8.5 V with the supply voltage of 3.3 V.

A Fault Location Algorithm Using Adaptively Estimated Local Source Impedance for a Double-Circuit Transmission Line System (자기단 전원 임피던스 추정 기법을 사용한 병행 2회선 송전선로 고장점 표정 알고리즘)

  • Park, Gun-Ho;Kang, Sang-Hee;Kim, Sok-Il;Shin, Jonathan H.
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.3
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    • pp.373-379
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    • 2012
  • This paper presents a fault location algorithm based on the adaptively estimated value of the local sequence source impedance for faults on a parallel transmission line. This algorithm uses only the local voltage and current signals of a faulted circuit. The remote current signals and the zero-sequence current of the healthy adjacent circuit are calculated by using the current distribution factors together with the local terminal currents of the faulted circuit. The current distribution factors consist of local equivalent source impedance and the others such as fault distance, line impedance and remote equivalent source impedance. It means that the values of the current distribution factors can change according to the operation condition of a power system. Consequently, the accuracy of the fault location algorithm is affected by the two values of equivalent source impedances, one is local source impedance and the other is remote source impedance. Nevertheless, only the local equivalent impedance can be estimated in this paper. A series of test results using EMTP simulation data show the effectiveness of the proposed algorithm. The proposed algorithm is valid for a double-circuit transmission line system where the equivalent source impedance changes continuously.

Design and fabrication of the Built-in Testing Circuit for Improving IC Reliability (IC 신뢰성 향상을 위한 내장형 고장검출 회로의 설계 및 제작)

  • Ryu, Jang-Woo;Kim, Hoo-Sung;Yoon, Jee-Young;Hwang, Sang-Joon;Sung, Man-Young
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.5
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    • pp.431-438
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    • 2005
  • In this paper, we propose the built-in current testing circuit for improving reliability As the integrated CMOS circuits in a chip are increased, the testability on design and fabrication should be considered to reduce the cost of testing and to guarantee the reliability In addition, the high degree of integration makes more failures which are different from conventional static failures and introduced by the short between transistor nodes and the bridging fault. The proposed built-in current testing method is useful for detecting not only these failures but also low current level failures and faster than conventional method. In normal mode, the detecting circuit is turned off to eliminate the degradation of CUT(Circuits Under Testing). The differential input stage in detecting circuit prevents the degradation of CUT in test mode. It is expected that this circuit improves the quality of semiconductor products, the reliability and the testability.

A Study on the Prediction of the Mechanical Properties of Printed Circuit Boards Using Modal Parameters (모달 파라미터 정보를 활용한 PCB 물성 예측에 관한 연구)

  • Choo, Jeong Hwan;Jung, Hyun Bum;Hong, Sang Ryel;Kim, Yong Kap;Kim, Jae San
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.41 no.5
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    • pp.421-426
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    • 2017
  • In this study, we propose a method for predicting the mechanical properties of the printed circuit board (PCB) that has transversely isotropic characteristics. Unlike the isotropic material, there is no specific test standard for acquisition of the transversely isotropic properties. In addition, common material test methods are not readily applicable to that type of laminated thin plate. Utilizing the natural frequency obtained by a modal test and the sizing optimization technique provided in $OptiStruct^{(R)}$, the mechanical properties of a PCB were derived to minimize the difference between test and analysis results. In addition, the validity of the predicted mechanical properties was confirmed by the MAC (Modal Assurance Criteria) value of each of the compared mode shapes. This proposed approach is expected to be extended to the structural analysis for the design verification of the top product that includes a PCB.

Effects of High Temperature-moisture on Corrosion and Mechanical Properties for Sn-system Solder Joints (고온고습환경이 Sn계 무연솔더의 부식 및 기계적 특성에 미치는 영향)

  • Kim, Jeonga;Park, Yujin;Oh, Chul Min;Hong, Won Sik;Ko, Yong-Ho;Ahn, Sungdo;Kang, Namhyun
    • Journal of Welding and Joining
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    • v.35 no.3
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    • pp.7-14
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    • 2017
  • The effect of high temperature-moisture on corrosion and mechanical properties for Sn-0.7Cu, Sn-3.0Ag-0.5Cu (SAC305) solders on flexible substrate was studied using Highly Accelerated Temperature/Humidity Stress Test (HAST) followed by three-point bending test. Both Sn-0.7Cu and SAC305 solders produced the internal $SnO_2$ oxides. Corrosion occurred between the solder and water film near flexible circuit board/copper component. For the SAC305 solder with Ag content, furthermore, octahedral corrosion products were formed near Ag3Sn. For the SAC305 and Sn-0.7Cu solders, the amount of internal oxide increased with the HAST time and the amount of internal oxides was mostly constant regardless of Ag content. The size of the internal oxide was larger for the Sn-0.7Cu solder. Despite of different size of the internal oxide, the fracture time during three-point bending test was not significantly changed. It was because the bending crack was always initiated from the three-point corner of the chip. However, the crack propagation depended on the oxides between the flexible circuit board and the Cu chip. The fracture time of the three-point bending test was dependent more on the crack initiation than on the crack propagation.