• 한국산학기술학회논문지
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• 제5권5호
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• pp.458-461
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• 2004

본 논문에서는 Si wafer와 Cu사이의 밀착력을 증가시키기 위해 Si wafer전처리 후 plasma와 SAMs처리 방법에 의한 Cu도금의 형성에 관한 방법을 설명하였다. Si wafer를 Piranha solution과 $0.5{\%}$ HF처리 후 유기박막인 SAMs과 plasma를 이용하는 방법으로 wafer와 Cu층 사이의 밀착력을 증가시켰다. 도금층의 밀착력은 scratch test 로 측정하였으며 , AFM을 이용해 시편에 형성된 패턴의 형태를 관찰하고 SEM과 EDS를 이용해 시편의 조직을 관찰하였다. 그 결과 Si wafer를 $O_{2}, He, SAMs$를 혼합처리 했을 때 밀착성이 가장 우수하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2010년도 제39회 하계학술대회 초록집
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• pp.128-128
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• 2010

In this study, we investigated the evolution and reduction of the surface roughness during the high-speed chemical dry thinning process of Si wafers. The direct injection of NO gas into the reactor during the supply of F radicals from NF3 remote plasmas was very effective in increasing the Si thinning rate, due to the NO-induced enhancement of the surface reaction, but resulted in the significant roughening of the thinned Si surface. However, the direct addition of Ar and N2 gas, together with NO gas, decreased the root mean square (RMS) surface roughness of the thinned Si wafer significantly. The process regime for the increasing of the thinning rate and concomitant reduction of the surface roughness was extended at higher Ar gas flow rates. In this way, Si wafer thinning rate as high as $20\;{\mu}m/min$ and very smooth surface roughness was obtained and the mechanical damage of silicon wafer was effectively removed. We also measured die fracture strength of thinned Si wafer in order to understand the effect of chemical dry thinning on removal of mechanical damage generated during mechanical grinding. The die fracture strength of the thinned Si wafers was measured using 3-point bending test and compared. The results indicated that chemical dry thinning with reduced surface roughness and removal of mechanical damage increased the die fracture strength of the thinned Si wafer.

• Journal of Welding and Joining
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• 제18권6호
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• pp.74-82
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• 2000

The fluxless wetting properties of UBM-coated Si-wafer to the binary lead-free solders(Sn-Ag, Sn-Sb, Sjn-In, Sn0Bi) were estimated by wetting balance method. With the new wettability indices from the wetting curves of one side coated specimen, the wetting property estimation of UBM-coated Si-wafer was possible. For UBM of Si-chip, Au/Cu/Cr UBm was better than au/Ni/TI in the point of wetting time/ At general reflow process temperature, the wettability of high melting point solders(Sn-Sb, Sn-Ag) was better than that of low melting point one(Sn-Bi, Sn-In). The contact angle of the one side coated Si-plate to the solder could be calculated from the force balance equation by measuring the static state force and the tilt angle.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권3호
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• pp.196-203
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• 2004

A three-dimensional (3D) IC technology platform is presented for high-performance, low-cost heterogeneous integration of silicon ICs. The platform uses dielectric adhesive bonding of fully-processed wafer-to-wafer aligned ICs, followed by a three-step thinning process and copper damascene patterning to form inter-wafer interconnects. Daisy-chain inter-wafer via test structures and compatibility of the process steps with 130 nm CMOS sal devices and circuits indicate the viability of the process flow. Such 3D integration with through-die vias enables high functionality in intelligent wireless terminals, as vertical integration of processor, large memory, image sensors and RF/microwave transceivers can be achieved with silicon-based ICs (Si CMOS and/or SiGe BiCMOS). Two examples of such capability are highlighted: memory-intensive Si CMOS digital processors with large L2 caches and SiGe BiCMOS pipelined A/D converters. A comparison of wafer-level 3D integration 'lith system-on-a-chip (SoC) and system-in-a-package (SiP) implementations is presented.

• 한국윤활학회:학술대회논문집
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• 한국윤활학회 2004년도 학술대회지
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• pp.90-98
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• 2004

Nano/micro-scale studies on friction properties were conducted on Si (100) and three self-assembled monolayers (SAMs) (PFOTC, DMDM, DPDM) coated on Si-wafer by chemical vapor deposition technique. Experiments were conducted at ambient temperature $(24{\pm}1^{\circ}C)$ and humidity $(45{\pm}5\%)$. Nano-friction was evaluated using Atomic Force Microscopy (AFM) in the range of 0-40nN normal loads. In both Si-wafer and SAMs, friction increased linearly as a function of applied normal load. Results showed that friction was affected by the inherent adhesion in Si-wafer, and in the case of SAMs the physical/chemical structures had a major influence. Coefficient of friction of these test samples was also evaluated at the micro-scale using a micro-tribotester. It was observed that SAMs had superior frictional property due to their low interfacial energies. In order to study of the effect of contact area on friction coefficient at the micro-scale, friction was measured for Si-wafer and DPDM against Soda Lime balls (Duke Scientific Corporation) of different radii 0.25 mm, 0.5 mm and 1 mm at different applied normal loads $(1500,\;3000\;and\;4800{\mu}N)$. Results showed that Si-wafer had higher friction coefficient than DPDM. Furthermore, unlike that in the case of DPDM, friction was severely influenced by wear in the case of Si-wafer. SEM evidences showed that solid-solid adhesion to be the wear mechanism in Si-wafer.

• 한국산학기술학회:학술대회논문집
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• 한국산학기술학회 2004년도 춘계학술대회
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• pp.50-53
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• 2004

본 논문에서는 Si wafer와 Cu사이의 밀착력을 증가시키기 위해 Si wafer전처리 후 plasma와 SAMs처리 방법에 의한 Cu도금의 형성에 관한 방법을 설명하였다. Si wafer를 Piranha solution과 $0.5\%$ HF처리 후 유기박막인 SAMs과 plasma를 이용하는 방법으로 wafer와 Cu층 사이의 밀착력을 증가시켰다. 도금층의 밀착력은 scratch test 로 측정하였으며, AEM을 이용해 시편에 형성된 패턴의 형태를 관찰하고 SEM과 EDS를 이용해 시편의 조직을 관찰하였다. 그 결과 Si wafer를 O2, He, SAMs를 혼합처리 했을 때 밀착성이 가장 우수하였다.

• 마이크로전자및패키징학회지
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• 제7권2호
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• pp.55-62
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• 2000

Si-wafer에 단면 코팅된 UBM(Under Bump Metallurgy)의 젖음성을 Sn-Pb 솔더에서 평가하기 위하여 wetting balance 법을 사용하였다. 단면 코팅된 UBM의 젖음곡선은 양면 코팅된 시편의 젖음 곡선과 비교할 때, 젖음곡선의 모양이 비슷하고 젖음곡선을 특징짓는 변수들의 온도에 대한 변화경향이 일치하였다. 단면 코팅된 금속층의 젖음성을 젖음곡선으로부터 정의한 새로운 젖음 지수 $F_{min}$, $F_{s}t_{s}$로 평가할 수 있었다. Au/Cu/Cr UBM은 젖음시간의 측면에서 Au/Ni/Ti UBM보다 젖음성이 우수하였다 Si-wafer에 단면 코팅된 UBM과 Sn-Pb 솔더의 접촉각을 $F_{s}$와 기울어짐각을 측정하고 메니스커스의 정적상태에서 힘의 평형으로부터 유도된 식을 이용하여 계산할 수 있었다.

• 한국재료학회지
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• 제32권9호
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• pp.396-402
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• 2022

In this study, surface roughness and interfacial defect characteristics were analyzed after forming a high-k oxide film on the surface of a prime wafer and a test wafer, to study the possibility of improving the quality of the test wafer. As a result of checking the roughness, the deviation in the test after raising the oxide film was 0.1 nm, which was twice as large as that of the Prime. As a result of current-voltage analysis, Prime after PMA was 1.07 × 10 A/cm² and Test was 5.61 × 10 A/cm², which was about 5 times lower than Prime. As a result of analyzing the defects inside the oxide film using the capacitance-voltage characteristic, before PMA Prime showed a higher electrical defect of 0.85 × 10¹² cm^-2 in slow state density and 0.41 × 10¹³ cm^-2 in fixed oxide charge. However, after PMA, it was confirmed that Prime had a lower defect of 4.79 × 10¹¹ cm^-2 in slow state density and 1.33 × 10¹² cm^-2 in fixed oxide charge. The above results confirm the difference in surface roughness and defects between the Test and Prime wafer.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.374-375
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• 2006

This paper describes anodic bonding characteristics of MCA to Si-wafer using evaporated Pyrex #7740 glass thin-films for MEMS applications. Pyrex #7740 glass thin-films with the same properties were deposited on MCA under optimum RF sputter conditions (Ar 100 %, input power $1\;W/cm^2$). After annealing at $450^{\circ}C$ for 1 hr, the anodic bonding of MCA to Si-wafer was successfully performed at 600 V, $400^{\circ}C$ in $110^{-6}$ Torr vacuum condition. Then, the MCA/Si bonded interface and fabricated Si diaphragm deflection characteristics were analyzed through the actuation and simulation test. It is possible to control with accurate deflection of Si diaphragm according to its geometries and its maximum non-linearity being 0.05-0.08 %FS. Moreover, any damages or separation of MCNSi bonded interfaces did not occur during actuation test. Therefore, it is expected that anodic bonding technology of MCNSi-wafers could be usefully applied for the fabrication process of high-performance piezoelectric MEMS devices.

• Journal of Mechanical Science and Technology
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• 제20권6호
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• pp.738-747
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• 2006

The friction behaviour of Si-wafer, diamond-like carbon (DLC) and two self-assembled monolayers (SAMs) namely dimethyldichlorosilane (DMDC) and diphenyl-dichlorosilane (DPDC) coated on Si-wafer was studied under loading conditions in milli-newton (mN) range. Experiments were performed using a ball-on-flat type reciprocating micro-tribo tester. Glass balls with various radii 0.25 mm, 0.5 mm and 1 mm were used. The applied normal load was in the range of 1.5 mN to 4.8 mN. Results showed that the friction increased with the applied normal load in the case of all the test materials. It was also observed that friction was affected by the ball size. Friction increased with the increase in the ball size in the case of Si-wafer. The SAMs also showed a similar trend, but had lower values of friction than those of Si-wafer In-terestingly, for DLC it was observed that friction decreased with the increase in the ball size. This distinct difference in the behavior of friction in DLC was attributed to the difference in the operating mechanism. It was observed that Si-wafer and DLC exhibited wear, whereas wear was absent in the SAMs. Observations showed that solid-solid adhesion was dominant in Si-wafer, while plowing in DLC. The wear in these two materials significantly Influenced their friction. In the case of SAMs their friction behaviour was largely influenced by the nature of their molecular chains.