• Proceedings of the IEEK Conference
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• 2003.11b
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• pp.167-170
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• 2003

In this paper, a design and experiment of PCI Express Core verification Model is described. The model targeting Endpoint core verification is designed by using newly-emerging SystemC which is a system design language based on a new C++ class library and simulation engine. In the verification model, we developed a SystemC Host System model which act as a Root Complex and Device Driver dedicated to the PCI Express Endpoint RTL Core. The test of Host System Model is guided by scenarios which implements and acts point of Device Driver and Root Complex and shows the result of simulation. Also, We present the full structure of verification model and Host model.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2021.10a
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• pp.305-306
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• 2021

It has been designed very complex that gathering system for various sending data. Therefore it is very important that verification process of these functions. In this paper we design of integrated verification process for sensing data gathering system.

• Journal of Advanced Navigation Technology
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• v.23 no.5
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• pp.361-366
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• 2019

In developing the avionics system, a system integration laboratory (SIL) is established to verify the function and interworking of individual components. In case of individual verification of SIL's components and system integration, a SIL model that simulates the function and interworking of each equipment is developed and used. A SIL model shall be pre-verified against all data defined in the interface control document (ICD) before interworking with the actual equipment and reverified even when the ICD changes or functions change. However, if the verification of the SIL model is performed manually, the verification of the individual SIL model takes considerable time. For this reason, selective regression tests are often performed to determine a impact of SIL models on ICD changes and some functional changes. In this paper, we designed SIL model verification automation method to perform regession test by reducing verification time of SIL model and verify the usefulness of verification automation design by developing SIL model verification automation tool.

• Journal of KIISE:Computing Practices and Letters
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• v.8 no.3
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• pp.261-267
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• 2002

In SOC(System On a Chip) designs, reducing time and cast for design verification is the most critical to improve the design productivity. this is mainly because the designs require co-verifying HW together with SW, which results in the increase of verification complexity drastically. In this paper, to cope with the verification crisis in SOC designs, we propose a new verification methodology, so called integrated co-verification, which lightly combine both co-simulation and co-emulation in unified and seamless way. We have applied our integrated co-verification to ARM/AMBA platform-based co-verification environment with a commercial co-verification tool, Seamless CVE, and a physical prototyping board. The experiments has shown clear advantage of the proposed technique over conventional ones.

• Journal of the Korean Society of Systems Engineering
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• v.2 no.2
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• pp.33-38
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• 2006

It is well known that efficient management and thorough implementation of stakeholder requirements is vital for a successful development of a large-scale and complex system. Equally important is to make sure that all the requirements be correctly realized in the developed system. For the purpose, verification requirements are derived with traceability from the system requirements. This paper discusses a step by step process for constructing the requirements verification model which includes : 1) the schema modeling both requirements and their traceability; 2) the template documenting the verification requirements; 3) the verification model constructed from the schema; and 4) the test and evaluation plan that can be printed automatically.

• Proceedings of the IEEK Conference
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• summer
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• pp.285-288
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• 2004

In this paper, we present a design and experiment of PCI Express core verification model. The model targeting Endpoint core based on Verilog HDL is designed by newly-emerging SystemC, which is a new C++ class library based system design approach. In the verification model, we designed and implemented a SystemC host system model which acted as Root Complex and device driver dedicated to the PCI Express Endpoint RTL core. The verification process is scheduled by scenarios which are implemented in host model. We show that the model is useful especially for verifying the RTL model which has dependencies on system software.

• Journal of the Institute of Convergence Signal Processing
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• v.12 no.4
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• pp.309-314
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• 2011

As a system becomes more complex, a design relies more heavily on a methodology based on high-level abstraction and functional verification. SystemVerilog includes characteristics of hardware design language and verification language in the form of extensions to the Verilog HDL. However, the OOP of System Veri log does not allow multiple inheritance. In this paper, we propose adoption of SystemC to introduce multiple inheritance. After being created, a SystemC unit is combined with a SystemVerilog-based verification environment using SystemVerilog DPI and ModelSim macro. Employing multiple inheritance of SystemC makes a design of a verification environment simple and easy through source code reuse. Moreover, a verification environment including SysemC unit has a benefit of reconfigurability due to OOP.

• Structural Engineering and Mechanics
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• v.65 no.2
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• pp.203-211
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• 2018

This paper introduces the development process of NCC(New Concrete Cutting) system and analyzes first verification test. Based on the first verification test results, some problems of NCC system have been newly modified. We carry out the second verification test. We tried to verify cutting performance and dust control efficiency of NCC system through the cutting test of concrete bridge piers. In particular, this verification test strives to solve the problem of concrete dust, which is the biggest problem of dry cutting method. The remaining dust problems in cutting section tried to solve through this verification test. This verification test of the NCC system shows that the dust problem of dry cutting method is closely controlled and solved. In conclusion, the proposed NCC method is superior to the dry cutting method in all aspects, including cutting performance, dust vacuum efficiency and cooling effect. The proposed NCC system is believed to be able to provide eco-friendly cutting technology to various industries, such as the removal of the SOC structures and the dismantling of nuclear plants, which have recently become a hot issue in the field of concrete cutting.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.663-667
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• 1999

In this paper, we review the conventional speaker verification algorithm and present the text-dependent speaker verification system for application over telephone lines and its result of experiments. We apply blind-segmentation algorithm which segments speech into sub-word unit without linguistic information to the speaker verification system for training speaker model effectively with limited enrollment data. And the World-mode] that is created from PBW DB for score normalization is used. The experiments are presented in implemented system using database, which were constructed to simulate field test, and are shown 3.3% EER.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.45 no.11
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• pp.998-1005
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• 2017

In this paper, we first introduce a systematic verification procedure for hierarchically structured avionics system. By making use of equipment models, it can perform individual verifications of each subsystem, integrated verifications of multiple subsystems, and an integrated verification of a whole system. A multi-mode system integration laboratory is then proposed to make it possible to execute various individual or integrated verification tests at the same time. By mathematically proving that the proposed multi-mode system integration laboratory needs less verification time than the conventional verification methodology, it is expected to enhance the efficiency of the systematic verification procedure and as a result, reduce the overall verification period and costs.