• Title/Summary/Keyword: system LSI

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Corrosion control technique for pipeline system through injecting water stabilizer (수질안정화 약품 주입에 따른 상수도관 내부 부식제어 특성 연구)

  • Hwang, Byung-Gi;Woo, Dal-Sik
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.1
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    • pp.545-551
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    • 2011
  • Recently, demands for generating high quality tap waters are increasing with high concern of water pollution and corrosion of water pipelines. For the reasons, developing water quality stabilization technique in water purification system is sought rather than replacing to a new pipelines. In this study, high-purity liquid lime($Ca(OH)_2$) was introduced for a water quality stabilization technique in water purification process and simulated water distribution system of pilot-scale size was applied to evaluate anti-corrosion control effect. The effect of anti-corrosion control was calculated in terms of LSI(Langelier Saturation Index) In conclusion, the result of pilot plant showed improvement of corrosiveness by liquid lime($Ca(OH)_2$) with reduction of released iron(Fe). Application of anti-corrosion control technique to the mild steel coupon and the copper coupon were effective by indicating 35.4, 44.5% of improvements. Besides, sample pipes which were treated with liquid lime had formated more thicker layer of corrosion product inside of pipes. As a result, the process of injecting water stabilizer can greatly contribute to the high quality of tap water.

Noncentral F-Distribution for an M-ary Phase Shift Keying Wedge-Shaped Region

  • Kim, Jung-Su;Chong, Jong-Wha
    • ETRI Journal
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    • v.31 no.3
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    • pp.345-347
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    • 2009
  • This letter presents an alternative analytical expression for computing the probability of an M-ary phase shift keying (MPSK) wedge-shaped region in an additive white Gaussian noise channel. The expression is represented by the cumulative distribution function of known noncentral F-distribution. Computer simulation results demonstrate the validity of our analytical expression for the exact computation of the symbol error probability of an MPSK system with phase error.

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Development of advanced voice recorder control system (개선된 음성 기록 제어 장치의 개발)

  • 장중식
    • Proceedings of the Korea Society for Simulation Conference
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    • 1999.10a
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    • pp.272-277
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    • 1999
  • The necessity of voice recording device was increased using voice signal IC with designed LSI/VLSI. The control unit which developed here voice recorder has low power dissipation, portable, and comfortable using voice source. However, the Korea voice recorder abilities far behind of foreign products for its performance and size on sailing. So we used Chua circuit to improvement voice quality abilities after minimize power supply device and circuit by designing voice recording device into lower power dissipation power circuit.

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A Fuzzy Processor Consistion of Memory and Controlling LSI

  • Yikai, Kunio;Honda, Nakaji;Satoh, Akira
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 1993.06a
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    • pp.789-792
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    • 1993
  • We have proposed a fuzzy model for behavior of vehicles in the road traffic simulation system with microscopic model for analyzing traffic jam in the broad areas. It can exactly simulate each vehicle's behavior. We propose a new hardware processor to simulate fuzzy decision-making mechanism for its model. This paper describes the functions, performance and structure of the hardware processor.

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Control of Elevator System Model Using Microcomputer (Microcomputer를 이용한 엘리베이터 시스템 모델의 제어)

  • 송현빈;변증남
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.16 no.2
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    • pp.35-42
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    • 1979
  • A conventional elevator system, which requires simultaneous control of the speed and the position, contains complicated analog hardwares as the control system. Recent advances in LSI technology, however, suggest that the control of such ane levator system may be realized by Incorporating digital device and microcomputer. In this paper, such a possibility is investigated. In this paper, the digital controller, witch is implemented around an IMSAl 8080 microcomputer is designed for the control of model elevator system. Experiments show that this contra .system tracks the given velocity curve as well as it brings the elevator to the enact point.

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A Novel High Performance Scan Architecture with Dmuxed Scan Flip-Flop (DSF) for Low Shift Power Scan Testing

  • Kim, Jung-Tae;Kim, In-Soo;Lee, Keon-Ho;Kim, Yong-Hyun;Baek, Chul-Ki;Lee, Kyu-Taek;Min, Hyoung-Bok
    • Journal of Electrical Engineering and Technology
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    • v.4 no.4
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    • pp.559-565
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    • 2009
  • Power dissipation during scan testing is becoming an important concern as design sizes and gate densities increase. The high switching activity of combinational circuits is an unnecessary operation in scan shift mode. In this paper, we present a novel architecture to reduce test power dissipation in combinational logic by blocking signal transitions at the logic inputs during scan shifting. We propose a unique architecture that uses dmuxed scan flip-flop (DSF) and transmission gate as an alternative to muxed scan flip-flop. The proposed method does not have problems with auto test pattern generation (ATPG) techniques such as test application time and computational complexity. Moreover, our elegant method improves performance degradation and large overhead in terms of area with blocking logic techniques. Experimental results on ITC99 benchmarks show that the proposed architecture can achieve an average improvement of 30.31% in switching activity compared to conventional scan methods. Additionally, the results of simulation with DSF indicate that the powerdelay product (PDP) and area overhead are improved by 28.9% and 15.6%, respectively, compared to existing blocking logic method.

Adjusting the Sensitivity of an Active Pixel Sensor Using a Gate/Body-Tied P-Channel Metal-Oxide Semiconductor Field-Effect Transistor-Type Photodetector With a Transfer Gate (전송 게이트가 내장된 Gate/Body-Tied P-Channel Metal-Oxide Semiconductor Field-Effect Transistor 구조 광 검출기를 이용한 감도 가변형 능동 화소 센서)

  • Jang, Juneyoung;Lee, Jewon;Kwen, Hyeunwoo;Seo, Sang-Ho;Choi, Pyung;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
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    • v.30 no.2
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    • pp.114-118
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    • 2021
  • In this study, the sensitivity of an active pixel sensor (APS) was adjusted by employing a gate/body-tied (GBT) p-channel metal-oxide semiconductor field-effect transistor (PMOSFET)-type photodetector with a transfer gate. A GBT PMOSFET-type photodetector can amplify the photocurrent generated by light. Consequently, APSs that incorporate GBT PMOSFET-type photodetectors are more sensitive than those APSs that are based on p-n junctions. In this study, a transfer gate was added to the conventional GBT PMOSFET-type photodetector. Such a photodetector can adjust the sensitivity of the APS by controlling the amount of charge transmitted from the drain to the floating diffusion node according to the voltage of the transfer gate. The results obtained from conducted simulations and measurements corroborate that, the sensitivity of an APS, which incorporates a GBT PMOSFET-type photodetector with a built-in transfer gate, can be adjusted according to the voltage of the transfer gate. Furthermore, the chip was fabricated by employing the standard 0.35 ㎛ complementary metal-oxide semiconductor (CMOS) technology, and the variable sensitivity of the APS was thereby experimentally verified.

Low-Power Bus Architecture Composition for AMBA AXI

  • Na, Sang-Kwon;Yang, Sung;Kyung, Chong-Min
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.2
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    • pp.75-79
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    • 2009
  • A system-on-a-chip communication architecture has a significant impact on the performance and power consumption of modern multi-processors system-on-chips (MPSoCs). However, customization of such architecture for a specific application requires the exploration of a large design space. Thus, system designers need tools to rapidly explore and evaluate communication architectures. In this paper we present the method for application-specific low-power bus architecture synthesis at system-level. Our paper has two contributions. First, we build a bus power model of AMBA AXI bus communication architecture. Second, we incorporate this power model into a low-power architecture exploration algorithm that enables system designers to rapidly explore the target bus architecture. The proposed exploration algorithm reduces power consumption by 20.1% compared to a maximally connected reduced matrix, and the area is also reduced by 20.2% compared to the maximally connected reduced matrix.

A System-on-a-Chip Design for Digital TV

  • Rhee, Seung-Hyeon;Lee, Hun-Cheol;Kim, Sang-Hoon;Choi, Byung-Tae;Lee, Seok-Soo;Choi, Seung-Jong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.5 no.4
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    • pp.249-254
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    • 2005
  • This paper presents a system-on-a-chip (SOC) design for digital TV. The single LSI incorporates almost all essential parts such as CPU, ISO/IEC 11172/13818 system/audio/video decoders, a video post-processor, a graphics/OSD processor and a display processor. It has analog IP's inside such as video DACs, an audio PLL, and a system PLL to reduce the system-level implementation cost. Descramblers and Smart Card interface are included to support widely used conditional access systems. The video decoder can decode two video streams simultaneously. The DSP-based audio decoder can process various audio coding specifications. The functional blocks for video quality enhancement also form outstanding features of this SoC. The SoC supports world-wide major DTV services including ATSC, ARIB, DVB, and DIRECTV.