• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.64 no.4
• /
• pp.291-296
• /
• 2015

Transmission line is exposed to a large area, and then faults are likely to occur than the other component of power system. When a fault occurs on a transmission line, fault locator helps fast recovery of power supply on power system. This paper deals with the design of a digital fault locator for improvement accuracy of the fault distance estimation and a fault occurrence position for transmission line. The algorithm of a fault locator uses a DC offset removal filter and DFT filter. The algorithm utilizes a fault data of GPS time synchronized. The computed fault information is transmitted to the other side substation through communication. The digital fault locator includes MPU module, ADPU module, SIU module, and a power module. The MMI firmware and software of the fault locator was implemented.

• Journal of the Korean Magnetic Resonance Society
• /
• v.24 no.2
• /
• pp.59-65
• /
• 2020

Nitrogen-Vacancy (NV) center in diamond has been an emerging versatile tool for quantum sensing applications. Amongst various applications, nano-scale nuclear magnetic resonance (NMR) using a single or ensemble NV centers has demonstrated promising results, opening possibility of a single molecule NMR for its chemical structural studies or multi-nuclear spin spectroscopy for quantum information science. However, there is a key challenge, which limited the spectral resolution of NMR detection using NV centers; the interrogation duration for NV-NMR detection technique has been limited by the NV sensor spin lifetime (T₁ ~ 3ms), which is orders of magnitude shorter than the coherence times of nuclear spins in bulk liquid samples (T₂ ~ 1s) or intrinsic ¹³C nuclear spins in diamond. Recent studies have shown that quantum memory technique or synchronized readout detection technique can further narrow down the spectral linewidth of NMR signal. In this short review paper, we overview basic concepts of nanoscale NMR using NV centers, and introduce further developments in high spectral resolution NV NMR studies.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.24 no.6A
• /
• pp.894-904
• /
• 1999

In this paper, a synchronized stream cryptosystem for secure communication in radio channel is designed and its security level is analyzed. The main parts of the proposed cryptosystem consist of synchronization pattern generator, session key generator, and key stream generator. The system performance is evaluated by analyzing the security level depending on the randomness, period, linear complexity, and correlation immunity. Experimental results with image data signal in the 10-1 and 10-2 channel error environment demonstrate the proper operation of the implemented crypto system.

• 제어로봇시스템학회:학술대회논문집
• /
• 2002.10a
• /
• pp.82.3-82
• /
• 2002

This paper designs an integrated navigation system that uses the signals from both GPS satellites and pseudolites. While GPS satellite clocks are synchronized, pseudolite clocks are not exactly synchronized even though pseudolite can use 1PPS signal from the GPS receiver. This can cause large range error and can be solved by transmitting the correction information. Assuming that the positions of pseudolites are known, it is possible to determine the true range between two pseudolites. Also, from the measurement of pseudolite signals, the pseudo range between two pseudolites can be calculated. Using the difference between the true range and the pseudo range, each pesudolite can produce correc...

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2017.10a
• /
• pp.522-523
• /
• 2017

Analog-to-Digital converter is designed using a current conveyor circuit and a time-to-digital converter. The analog voltage is sampled using the current conveyor circuit and then the voltage is converted to time information by the discharge of the sampling voltage. The time information is converted to digital value by the counter-type time-to-digital converter. In order to reduce the converted error the clock is synchronized with the time information pulse.

• Journal of Positioning, Navigation, and Timing
• /
• v.6 no.1
• /
• pp.1-8
• /
• 2017

In this study, to design a multi-GNSS receiver using single RF front-end, the receiving performances for various frequency plans were evaluated. For the fair evaluation and comparison of different frequency plans, the same signal needs to be received at the same time. For this purpose, two synchronized RF front-ends were configured using USRP X310, and PC-based software was implemented so that the quality of the digital IF signal received at each front-end could be evaluated. The software consisted of USRP control, signal reception, signal acquisition, signal tracking, and C/N0 estimation function. Using the implemented software and USRP-based hardware, the signal receiving performances for various frequency plans, such as the signal attenuation status, overlapping of different systems, and the use of imaginary or real signal, were evaluated based on the C/N0 value. The results of the receiving performance measurement for the various frequency plans suggested in this study would be useful reference data for the design of a multi-GNSS receiver in the future.

• Journal of information and communication convergence engineering
• /
• v.8 no.2
• /
• pp.197-200
• /
• 2010

The FLL(frequency locked loop) circuit is used to generate an output signal that tracks an input reference signal. The locking time of FLL is short compared to PLL(phase locked loop) circuit because the output signal of FLL is synchronized only in frequency. Also the FLL is designed to allow the circuit to be fully integrated. In this paper, the temperature stable FLL circuit is designed by using full CMOS transistors. When the temperature is varied from $-20^{\circ}C$ to $70^{\circ}C$, the variation of output frequency is about from -2% to 1.6% from HSPICE simulation results.

• Proceedings of the Acoustical Society of Korea Conference
• /
• 1992.06a
• /
• pp.29-32
• /
• 1992

In this paper, a systolic array structure is derived from the realization of 2-D IIR digital filters directed from the SFG(signal flow graph). After realized the 1-D formed partial systolic array, we implemented the complete systolic array to be cascaded 1-D form. The cascading of partial systolic arrays reduce the storage element which sued to delay input signal. 1-D systolic array is derived from that DG is designed through local communication approach and then it mapping to SFG. The derived structure is very simple and has high throughput because during new imput sample is supplied, new output is obtained every sampling period. And broadcast input signal is eliminated. Since the systolic array has property of regularity, modularity, local interconnection and highly synchronized multiprocessing, thus is very suitable for VLSI implementation.

• Journal of information and communication convergence engineering
• /
• v.7 no.1
• /
• pp.62-65
• /
• 2009

In this paper, the temperature characteristics of full CMOS FLL(frequency locked loop) re analyzed. The FLL circuit is used to generate an output signal that tracks an input efference signal. The locking time of FLL is short compared to PLL(phase locked loop) circuit because the output signal of FLL is synchronized only in frequency. Also the FLL s designed to allow the circuit to be fully integrated. The FLL circuit is composed two VCs, two buffers, a VCO and two frequency dividers. The temperature variation of frequency divider, FVC and buffer cancelled because the circuit structure. is the same and he temperature effect is cancelled by the comparator. Simulation results are shown to illustrate the performance of the designed FLL circuit with temperature.

• Journal of IKEEE
• /
• v.22 no.4
• /
• pp.1195-1201
• /
• 2018

This paper interprets the relationship between the physical activity of the human and the signal of the brain to show the meaningful results in the process of sending and receiving information to the connected muscles. When a person works or thinks, a specific brain signal is generated from the brain and being trasmmited to the connected part. The EMG signal, which has muscle activity information, outputs the result of the muscle activation as an electrical signal, which outputs muscle activity information usually due to muscle contraction and relaxation. The purpose of this study is to analyze the relationship between the two signals, which are difficult to identify easily by visual data extraction and data acquisition by extracting such EMG and EMG in real time.