• Korean Journal of Metals and Materials
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• v.48 no.7
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• pp.660-666
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• 2010

30 nm thick Ni layers were deposited on a glass substrate by e-beam evaporation. Subsequently, 30 nm or 60 nm ${\alpha}-Si:H$ layers were grown at low temperatures ($<220^{\circ}C$) on the 30 nm Ni/Glass substrate by catalytic CVD (chemical vapor deposition). The sheet resistance, phase, microstructure, depth profile and surface roughness of the $\alpha-Si:H$ layers were examined using a four-point probe, HRXRD (high resolution Xray diffraction), Raman Spectroscopy, FE-SEM (field emission-scanning electron microscopy), TEM (transmission electron microscope) and AES depth profiler. The Ni layers reacted with Si to form NiSi layers with a low sheet resistance of $10{\Omega}/{\Box}$. The crystallinty of the $\alpha-Si:H$ layers on NiSi was up to 60% according to Raman spectroscopy. These results show that both nano-scale NiSi layers and crystalline Si layers can be formed simultaneously on a Ni deposited glass substrate using the proposed low temperature catalytic CVD process.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.4
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• pp.59-63
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• 2013

In this paper, the impact of the copper densities of substrate layers on IC package warpage is studied experimentally and numerically. The substrate strips used in this study contained two metal layers, with the metal densities and patterns of these two layers varied to determine their impacts. Eight legs of substrate strips were prepared. Leg 1 to leg 5 were prepared with a HD (high density) type of strip and leg 6 to leg 8 were prepared with UHD (ultra high density) type of strip. The top copper metal layer was designed to feature meshed patterns and the bottom copper layer was designed to feature circular patterns. In order to consider the process factors, the warpage of the substrate bottom was measured step by step with the following manufacturing process: (a) bare substrate, (b) die attach, (c) applying mold compound (d) and post reflow. Furthermore, after the post reflow step, the substrate strips were diced to obtain unit packages and the warpage of the unit packages was measured to check the warpage trends and differences. The experimental results showed that the warpage trend is related to the copper densities. In addition to the experiments, a Finite Element Modeling (FEM) was used to simulate the warpage. The nonlinear material properties of mold compound, die attach, solder mask, and substrate core were included in the simulation. Through experiment and simulation, some observations were concluded.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.4
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• pp.267-273
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• 1998

The band structures of $Si_{1-x}Ge_x$ layers grown on $Si_{1-y}Ge_y$ substrate are calculated using k$\cdot$p and strain Hamiltonians. The hole drift mobilities in the plane direction are then calculated by taking into account the screening effect and the density-of-states of the impurity band. When $Si_{1-x}Ge_x$ is grown on Si substrate, the mobilities of (110) and (111) $Si_{1-x}Ge_x$ layers are larger than that of (001) $Si_{1-x}Ge_x$. However, due to the large defect and surface scattering, (110) and (111) $Si_{1-x}Ge_x$ layers may not be useful for the development of the fast device. Meanwhile, when Si is grown on $Si_{1-y}Ge_y$ substrate, the mobilities of (001) and (110) Si layers are greatly enhanced. Based on the amount of defect and the surface scattering, it is expected that Si grown on (001) $Si_{1-y}Ge_y$ substrate, where the Ge contents is larger than 10%(y>0.1), has the highest mobility.

• Journal of the Korean Vacuum Society
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• v.2 no.4
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• pp.501-506
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• 1993

The spatial potential distribution of electron cyclotron resonance plasma is measured as a function of tehsubstrate DC bias by Langmuir probe method. It is observed that the substrate DC bias changes the slope of the plasma potential near the subsrate, resulting in changes in flux and energy of the impinging ions across plasma $_strate boundary along themagnetric field. The effect of the substrate DC bias on the low-temperature silicon homoepitaxy (below $560^{\circ}C$) is examine dby in situ reflection high energy electron diffraction (RHEED), cross-section transmission electron microscopy (XTEM),plan-view TEM and high resolution transmision electron microscopy(HRTEM). While the polycrystalline silicon layers are grow withnegative substrate biases, the single crystaline silicon layers are grown with negative substrate biases, the singel crystalline silicon layers are grown with positive substrate biases. As the substrate bias changes form negative to positive values, the growth rate decreases. It is concluded that the control of the ion energy during plasma deposition is very important in silicon epitaxy at low temperatures below $560^{\circ}C$ by UHV-ECRCVD.VD.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.24 no.8 s.179
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• pp.2108-2114
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• 2000

The buckling of two elastic layers bonded to a semi-infinite substrate under a transverse compressive plane strain is investigated. Incremental deformation theory, which considers the effect of the initial stress on the incremental stress field, is employed to describe the buckling behavior of both two isotropic layers and the semi-infinite substrate. The problem is converted to an eigenvalue-eigenvector case, from which the critical buckling strain and the buckling wavelength are obtained. The results are presented on the effects of the layer geometries and material properties on the buckling behavior.

• Proceedings of the KSME Conference
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• 2000.04a
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• pp.369-374
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• 2000

The buckling of two elastic layers bonded to a semi-infinite substrate under a transverse compressive plane strain is investigated. Incremental deformation theory is employed to describe the buckling behavior of both two isotropic layers and the semi-infinite substrate. The problem is converted to an eigenvalue-eigenvector case, from which the critical buckling strain and the wavelength of the buckled shape are obtained. The results are presented on the effects of the layer geometries and material properties on the buckling behavior.

• Proceedings of the KIEE Conference
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• 1993.11a
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• pp.204-206
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• 1993

In this paper we represented electroplating process without seed layers for making metal micro structures needed for applying terminal voltage for one-to-one cell fusion system. In this system, we need thick insulator and metal structures because the diameter of a cell is approximately $40{\mu}m$. So, we adopted the photo-sensitive polyimide as electroplating molds and structural material. Generally, the processes utilizing the photo-sensitive polyimide as molds have metal seed layers on the substrate as electroplating electrodes and requires wiring tasks to these seed layers. We proposed electroplating process without any seed layer on the Si-substrate and simulated P-N-P (electrode - Si substrate - electrode) junction on N-type silicon substrate. Leakage current from one metal structure to another which arise when terminal voltage is applied can be remarkably decreased by doping Boron in the region to be electroplated.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.41-43
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• 2004

Plasma polymerized para-xylene ($PP_PX$) deposited by plasma-enhanced chemical vapor deposition (PECVD) was used as the barrier layer on the polyethylene terephthalate (PET) substrate to improve lifetime of the flexible organic light-emitting diodes (FOLEDs). The $PP_PX$ barrier layer deposited on top of the PET substrate with plasma power of 30 W at deposition pressure of 0.2 torr showed transmittance spectra good enough to be applied in FOLED on PET substrates. FOLEDs with the $PP_PX$ barrier layer (barrier-FOLEDs) showed similar I-V and B-V characteristics to FOLEDs without the $PP_PX$ layer (control-FOLEDs). The lifetime of barrier-FOLED was two times longer than that of the control-FOLED. With $PP_PX$ passivation layers, lifetimes of both control and barrier-FOLEDs were improved by more than 4 times. These results show that PECVD deposited $PP_PX$ layers can be used as barrier layers for FOLEDs on plastic substrates as well as passivation layers for general OLEDs.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.3
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• pp.199-205
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• 2006

Patterned sapphire substrates (PSS) were fabricated by a simple wet etching process with $SiO_2$ stripe masks and a mixed solution of $H_2SO_4$ and $H_3PO_4$. GaN layers were epitaxially grown on the PSS under the optimized 2-step growth condition of metalorganic vapor deposition. During the 1st growth step, GaN layers with triangular cross sections were grown on the selected area of the surface of the PSS, and in the 2nd growth step, the GaN layers were laterally grown and coalesced with neighboring GaN layers. The density of threading dislocations on the surface of the coalesced GaN layer was $2{\sim}4\;{\times}\;10^7\;cm^{-2}$ over the entire region. The epitaxial structure of near-UV light emitting diode (LED) was grown over the GaN layers on the PSS. The internal quantum efficiency and the extraction efficiency of the LED structure grown on the PSS were remarkably increased when compared to the conventional LED structure grown on the flat sapphire substrate. The reduction in TD density and the decrease in the number of times of total internal reflections of the light flux are mainly attributed due to high level of scattering on the PSS.

• Journal of the Korean Graphic Arts Communication Society
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• v.22 no.2
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• pp.151-162
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• 2004

MnSb layers were grown on GaAs(100), (111)A and (111)B substrates by hot wall epitaxy under various growth conditions. Growth condition dependence of structural properties of the layers was examined. The growth direction and structural properties of MnSb/GaAs(100) depend on Sb source and substrate temperatures. The smooth MnSb(10.1)/GaAs(100) interface was obtained under the appropriate growth condition. On the other hand, MnSb(00.1) layers were grown on GaAs(111) substrates. The quality of the layers on (111)B was superior to that on GaAs(111)A, but degraded as in increasing Sb source temperature during the growth. The $Mn_2Sb$ domain was generated in the layers grown under conditions of low Sb source temperature and high substrate temperature on GaAs(111) substrates.