• Title/Summary/Keyword: stress voltage

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A New Z-Source Inverter Topology with High Voltage Boost Ability

  • Trinh, Quoc-Nam;Lee, Hong-Hee
    • Journal of Electrical Engineering and Technology
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    • v.7 no.5
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    • pp.714-723
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    • 2012
  • A new Z-source inverter (ZSI) topology is developed to improve voltage boost ability. The proposed topology is modified from the switched inductor topology by adding some more inductors and diodes into inductor branch to the conventional Z-source network. The modulation methods developed for the conventional ZSI can be easily utilized in the proposed ZSI. The proposed ZSI has an ability to obtain a higher voltage boost ratio compared with the conventional ZSI under the same shoot-through duty ratio. Since a smaller shoot-through duty ratio is required for high voltage boost, the proposed ZSI is able to reduce the voltage stress on Z-source capacitor and inverter-bridge. Theoretical analysis and operating principle of the proposed topology are explicitly described. In addition, the design guideline of the proposed Z-source network as well as the PWM control method to achieve the desired voltage boost factor is also analyzed in detail. The improved performances are validated by both simulation and experiment.

Energy Coordination of Cascaded Voltage Limiting Type Surge Protective Devices (종속 접속된 전압제한형 서지방호장치의 에너지협조)

  • Lee, Bok-Hee;Shin, Hee-Kyung
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.27 no.2
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    • pp.29-35
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    • 2013
  • For the purpose of designing and applying optimum surge protection, one of the essential points is to take into account the energy coordination between cascaded surge protective devices(SPDs) and it is important to obtain an acceptable sharing of the energy stress between two cascaded SPDs. In this paper, in case of two voltage-limiting SPDs connected in parallel, the amount of splitting impulse current and energy that flow through each SPDs is investigated as a function of the protective distance. As a result, the energetic coordination between cascaded SPDs is strongly dependent on the voltage protection level of SPDs and the protective distance. It was confirmed that the sharing of the energy between two cascaded SPDs and the limited voltage levels are appropriate when the voltage protection levels of both upstream and downstream SPDs are the same.

A Study on the Insulation Characteristics for Stator Windings of IGBT PWM Inverter-Fed Induction Motors

  • Hwang, Don-Ha;Kang, Dong-Sik;Kim, Yong-Joo;Lim, Tae-Hoon;Bae Sung-Woo;Kim Dong-Hee;Ro Chae-Gyun
    • Journal of Power Electronics
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    • v.3 no.3
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    • pp.159-166
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    • 2003
  • The winding insulation of low-voltage induction motors in adjustable-speed drive system with voltage-fed Inverters is substantially stressed due to the uneven voltage distribution and excessive voltage stress (dv/dt), which result in the premature insulation breakdown In this paper, the detailed insulation test results of 26 low-voltage induction motors are presented. Six different types of insulation techniques are applied to 26 motors. The insulation characteristics are analyzed with partial discharge, discharge inception voltage, AC current, and dissipation factor tests Also, insulation breakdown tests by high voltage pulses are performed, and the corresponding breakdown voltages obtained.

Reactive Current Assignment and Control for DFIG Based Wind Turbines during Grid Voltage Sag and Swell Conditions

  • Xu, Hailiang;Ma, Xiaojun;Sun, Dan
    • Journal of Power Electronics
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    • v.15 no.1
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    • pp.235-245
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    • 2015
  • This paper proposes a reactive current assignment and control strategy for a doubly-fed induction generator (DFIG) based wind-turbine generation system under generic grid voltage sag or swell conditions. The system's active and reactive power constrains during grid faults are investigated with both the grid- and rotor-side convertors (GSC and RSC) maximum ampere limits considered. To meet the latest grid codes, especially the low- and high-voltage ride-through (LVRT and HVRT) requirements, an adaptive reactive current control scheme is investigated. In addition, a torque-oscillation suppression technique is designed to reduce the mechanism stress on turbine systems caused by intensive voltage variations. Simulation and experiment studies demonstrate the feasibility and effectiveness of the proposed control scheme to enhance the fault ride-through (FRT) capability of DFIG-based wind turbines during violent changes in grid voltage.

Tensile Stress Measurement of Tendon by Means of Non-contact Yoke Method (Yoke를 사용한 비접촉 방법에 의한 텐던 인장응력 측정)

  • Kang, Sunju;Son, Derac;Joh, Changbin;Lee, Jungwoo
    • Journal of the Korean Magnetics Society
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    • v.26 no.1
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    • pp.19-23
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    • 2016
  • In this study, we have constructed a measuring system to investigate tensile stress measurement of tendons, which is employed in bridges, by means of the non-destructive and non-contact method. The measuring system consists of tensile stress applying apparatus up to 2 GPa, and power supply for ac and dc current to tendon directly to magnetize tendon in circular direction and to coil wound on yoke to magnetize tendon in axial direction. We have used two kinds of tendon, which were produced by different companies, using the measuring system constructed in this work. Two kinds of experiments are carried out in this work; $1^{st}$ experiment : ac current was applied to the tendon and dc current was applied to coil wound on the yoke, and voltage induced from search coil wound on yoke (SCY) was measured and $2^{nd}$ experiment : dc current was applied to the tendon and ac current was applied to coil wound on the yoke, and voltage induced from search coil on tendon (SCT) was measured. In case of $1^{st}$ experiment, voltage induced from SCY was changed below 200MPa tensile stress but the voltage was not increased above 200 MPa. In case of $2^{nd}$ experiment, voltage induced from SCT was decreased up to 1.5 GPa linearly. We expect that $2^{nd}$ experiment could be applied to the non-destructive testing of tensile stress measurement of tendon.

A Study on the Output Voltage Characteristic of Switched Trans Z-Source Inverter (스위치드 변압기 Z-소스 인버터의 출력전압 특성에 관한 연구)

  • Kim, Se-Jin;Jung, Young-Gook;Lim, Young-Cheol
    • The Transactions of the Korean Institute of Power Electronics
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    • v.18 no.2
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    • pp.123-130
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    • 2013
  • This paper proposes the switched trans Z-source inverter(STZSI) which combined the characteristics of the trans Z-source inverter(TZSI) and the switched inductor Z-source inverter(SLZSI). The proposed STZSI has the same performance compared with the SLZSI which is improved the voltage boost performance of the conventional typical X-shaped ZSI, and it has advantage that circuit structure of Z-impedance network is more simple. And, in order to step up the voltage boost factor under the condition of the same duty ratio, unlike the SLZSI adding the inductors and diodes, the proposed method is dune by changing the turn ratio of trans primary winding of Z-impedance network. To confirm the validity of the proposed method, PSIM simulation and a DSP(TMS320F28335) based experiment were performed using trans with turn ratio 1 and 2 under the condition of the input DC voltage VI=50V, duty ratio D=0.1 and D=0.15. As a result, under the same input/ouput condition, the inverter arm voltage stress of the proposed method is reduced to about 15%-22% as compared with typical X-shaped ZSI, and the elements in Z-impedance network of the proposed method is reduced as compared with the SLZSI.

Analysis of a New Parallel Three-Level Zero-Voltage Switching DC Converter

  • Lin, Bor-Ren;Chen, Jeng-Yu
    • Journal of Electrical Engineering and Technology
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    • v.10 no.1
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    • pp.128-137
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    • 2015
  • A novel parallel three-level zero voltage switching (ZVS) DC converter is presented for medium voltage applications. The proposed converter includes three sub-circuits connected in parallel with the same power switches to share load current and reduce the current stress of passive components at the output side. Thus, the size of the output chokes is reduced and the switch counts in the proposed converter are less that in the conventional parallel three-level DC/DC converter. Each sub-circuit combines one half-bridge converter and one three-level converter. The transformer secondary windings of these two converters are connected in series in order to reduce the size of output inductor. Due to the three-level circuit topology, the voltage stress of power switches is equal to $V_{in}/2$. Based on the resonant behavior by the output capacitance of power switches and the leakage inductance (or external inductance) at the transition interval, each switch can be turned on under ZVS. Finally, experiments based on a 2 kW prototype are provided to verify the performance of the proposed converter.

A ZVS Resonant Converter with Balanced Flying Capacitors

  • Lin, Bor-Ren;Chen, Zih-Yong
    • Journal of Power Electronics
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    • v.15 no.5
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    • pp.1190-1199
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    • 2015
  • This paper presents a new resonant converter to achieve the soft switching of power devices. Two full-bridge converters are connected in series to clamp the voltage stress of power switches at Vin/2. Thus, power MOSFETs with a 500V voltage rating can be used for 800V input voltage applications. Two flying capacitors are connected on the AC side of the two full-bridge converters to automatically balance the two split input capacitor voltages in every switching cycle. Two resonant tanks are used in the proposed converter to share the load current and to reduce the current stress of the passive and active components. If the switching frequency is less than the series resonant frequency of the resonant tanks, the power MOSFETs can be turned on under zero voltage switching, and the rectifier diodes can be turned off under zero current switching. The switching losses on the power MOSFETs are reduced and the reverse recovery loss is improved. Experiments with a 1.5kW prototype are provided to demonstrate the performance of the proposed converter.

Stress Analysis Using Finite Element Modeling of a Novel RF Microelectromechanical System Shunt Switch Designed on Quartz Substrate for Low-voltage Applications

  • Singh, Tejinder;Khaira, Navjot K.;Sengar, Jitendra S.
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.5
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    • pp.225-230
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    • 2013
  • This paper presents a novel shunt radio frequency microelectromechanical system switch on a quartz substrate with stiff ribs around the membrane. The buckling effects in the switch membrane and stiction problem are the primary concerns with RF MEMS switches. These effects can be reduced by the proposed design approach due to the stiffness of the ribs around the membrane. A lower mass of the beam and a reduction in the squeeze film damping is achieved due to the slots and holes in the membrane, which further aid in attaining high switching speeds. The proposed switch is optimized to operate in the k-band, which results in a high isolation of -40 dB and low insertion loss of -0.047 dB at 21 GHz, with a low actuation voltage of only 14.6 V needed for the operation the switch. The membrane does not bend with this membrane design approach. Finite element modeling is used to analyze the stress and pull-in voltage.

The Change of I-V Characteristics by Gate Voltage Stress on Few Atomic Layered MoS2 Field Effect Transistors (수 원자층 두께의 MoS2 채널을 가진 전계효과 트랜지스터의 게이트 전압 스트레스에 의한 I-V 특성 변화)

  • Lee, Hyung Gyoo;Lee, Gisung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.31 no.3
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    • pp.135-140
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    • 2018
  • Atomically thin $MoS_2$ single crystals have a two-dimensional structure and exhibit semiconductor properties, and have therefore recently been utilized in electronic devices and circuits. In this study, we have fabricated a field effect transistor (FET), using a CVD-grown, 3 nm-thin, $MoS_2$ single-crystal as a transistor channel after transfer onto a $SiO_2/Si$ substrate. The $MoS_2$ FETs displayed n-channel characteristics with an electron mobility of $0.05cm^2/V-sec$, and a current on/off ratio of $I_{ON}/I_{OFF}{\simeq}5{\times}10^4$. Application of bottom-gate voltage stresses, however, increased the interface charges on $MoS_2/SiO_2$, incurred the threshold voltage change, and degraded the device performance in further measurements. Exposure of the channel to UV radiation further degraded the device properties.