• Transactions of the Korean Society of Mechanical Engineers A
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• v.28 no.6
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• pp.774-782
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• 2004

This article presents a numerical and experimental investigation for the single-phase forced laminar convective heat transfer through arrays of micro-channels in micro heat exchangers to be used for cooling power-intensive semiconductor packages, especially the stacked multi-chip modules. In the numerical analysis, a parametric study was carried out for the parameters affecting the efficiency of heat transfer in the flow of coolants through parallel rectangular micro-channels. In the experimental study, the cooling performance of the micro heat exchanger was tested on prototypes of stacked multi-chip modules with difference channel dimensions. The simulation results and the experiment data were acceptably accordant within a wide range of design variations, suggesting the numerical procedure as a useful method for designing the cooling mechanism in stacked multi-chip packages and similar electronic applications.

• Korean Journal of Materials Research
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• v.29 no.12
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• pp.757-763
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• 2019

A stacked high-voltage (900 V) Al electrolytic capacitor made with ZrO₂ coated anode foils, which has not been studied so far, is realized and the effects of Zr-Al-O composite layer on the electric properties are discussed. Etched Al foils coated with ZrO₂ sol are anodized in 2-methyl-1,3-propanediol (MPD)-boric acid electrolyte. The anodized Al foils are assembled with stacked structure to prepare the capacitor. The capacitance and dissipation factor of the capacitor with ZrO₂ coated anode foils increase by 41 % and decrease by 50 %, respectively, in comparison with those of Al anode foils. Zr-Al-O composite dielectric layer is formed between separate crystalline ZrO₂ with high dielectric constant and amorphous Al₂O₃ with high ionic resistivity. This work suggests that the formation of a composite layer by coating valve metal oxide on etched Al foil surface and anodizing it in MPD-boric acid electrolyte is a promising approach for high voltage and volume efficiency of capacitors.

• Journal of the Microelectronics and Packaging Society
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• v.22 no.2
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• pp.5-9
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• 2015

Thermal management becomes serious in 3D stacked IC because of higher heat flux, increased power generation, extreme hot spot, etc. In this paper, we reviewed the recent developments of thermal management for 3D stacked IC which is a promising candidate to keep Moore's law continue. According to experimental and numerical simulation results, Cu TSV affected heat dissipation in a thin chip due to its high thermal conductivity and could be used as an efficient heat dissipation path. Other parameters like bumps, gap filling material also had effects on heat transfer between stacked ICs. Thermal aware circuit design was briefly discussed as well.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.1
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• pp.33-36
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• 2012

In this study, the thickness effects of $Al_2O_3$ layer on the sensing properties of $SiO_2/Al_2O_3$ (OA) stacked membrane were investigated using electrolyte-insulator-semiconductor (EIS) structure for high quality pH sensor. The $Al_2O_3$ layers with a respective thickness of 5 nm, 15 nm, 23 nm, 50 nm, and 100 nm were deposited on the 5-nm-thick $SiO_2$ layers. The electrical characteristics and sensing properties of each OA membranes were investigated using metal-insulator-semiconductor (MIS) and EIS devices, respectively. As a result, the OA stacked membrane with 23-nm-thick $Al_2O_3$ layer shows the excellent characteristics as a sensing membrane of EIS sensor, which can enhance the signal to noise ratio.

• Proceedings of the KIEE Conference
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• 2002.07c
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• pp.1546-1548
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• 2002

In this paper, the electrical characteristics of pentacene thin film transistors(TFTs) with stacked and surface-treated gate insulators have been investigated. The semiconductor layer of pentacene was thermally evaporated onto the stacked gate insulators. For the gate insulating materials. PVP(PolyvinylPhenol) and polystyrene were spin-coated with two different stacking orders, PVP-polystyrene and polystyrene-PVP. Rapid solvent evaporation during the spin-coating processes of these insulating layers produces non-equilibrium phase morphologies accompanied by surface undulations on gate insulator interfaces. This non-equilibrium phase morphology affects the growth mode of the subsequent pentacene layer. Therefore, in order to smoothen the gate dielectric surfaces, gate dielectric surfaces were rubbed laterally along the direction from the drain to the source TFTs with with stacked and surface-treated gate insulators have provided improved operational characteristics.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.51 no.10
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• pp.554-559
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• 2002

The at loss is an important issue in the design of superconducting cables and transformers. In these devices the Bi-2222 tapes are usually placed face-to-face. In such arrangements ac loss is influenced by adjacent tapes. The effect is investigated by measuring the magnetization loss in the stacked conductor, which consists of various numbers of Bi-2223 tapes. For the single tape the magnetization loss in perpendicular field is larger than that in parallel field by about a factor 10. This agrees well with the prediction for hysteresis loss in slab and strip models. For the stacked conductor in perpendicular field the magnetization loss at low fields is greatly decreased, compared to the loss of the single tape. However the loss at high fields is nearly unaffected. This behavior is well described by the slab model.

• Journal of the Korea Society of Computer and Information
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• v.27 no.1
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• pp.33-41
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• 2022

This paper describes a planar microstrip patch antenna designed on dielectric substrate. Two types of planar microstrip patch antennas are studied for the 5G wireless applications, one type is conventional microstrip structure, the other type is stacked microstrip structure fed by coaxial probe. Using electromagnetically coupling method, stacked microstrip patch antenna employing a multi-layer substrate structure was designed. The results indicate that the proposed stacked microstrip patch antenna performs well at 5G wireless service bandwith a broadband from 3.42GHz to 3.70GHz. The impedance bandwidth(VSWR≤2) is 360MHz(10.28%) from 3.42GHz to 3.78GHz. In this paper, through the designing of a stacked microstrip patch antenna, we have presented the availability for 5G wireless repeater system.

• The Bulletin of The Korean Astronomical Society
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• v.44 no.2
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• pp.43.1-43.1
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• 2019

In this study, we apply a deep learning model to denoising solar magnetograms. For this, we design a model based on conditional generative adversarial network, which is one of the deep learning algorithms, for the image-to-image translation from a single magnetogram to a denoised magnetogram. For the single magnetogram, we use SDO/HMI line-of-sight magnetograms at the center of solar disk. For the denoised magnetogram, we make 21-frame-stacked magnetograms at the center of solar disk considering solar rotation. We train a model using 7004 paris of the single and denoised magnetograms from 2013 January to 2013 October and test the model using 1432 pairs from 2013 November to 2013 December. Our results from this study are as follows. First, our model successfully denoise SDO/HMI magnetograms and the denoised magnetograms from our model are similar to the stacked magnetograms. Second, the average pixel-to-pixel correlation coefficient value between denoised magnetograms from our model and stacked magnetogrmas is larger than 0.93. Third, the average noise level of denoised magnetograms from our model is greatly reduced from 10.29 G to 3.89 G, and it is consistent with or smaller than that of stacked magnetograms 4.11 G. Our results can be applied to many scientific field in which the integration of many frames are used to improve the signal-to-noise ratio.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.10 s.113
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• pp.993-999
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• 2006

This paper presents the design simulation, implementation, and measurement of a miniaturized DCS, PCS / Satellite DMB dual-band stacked chip antenna with double coupled line for mobile communication terminals. A stacked meander is realized by using a via hole with height of 0.8 mm and a diameter of 0.35 mm to connect upper- and lower-layer meander sections for a reduction of the dimensions of the antenna. In addition the stacked meander chip antenna is extended by a double coupled-line to achieve two different radiation modes. A ratio of the first frequency and second frequency vary with the geometrical parameter of coupled lines. The fabricated antenna used FR-4 substrate with relative permittivity of 4.2. And its dimensions are $15.2{\times}7{\times}0.8mm^3$. The measured impedance bandwidth(VSRW<2) are 244 and 120 MHz at the operating frequency, respectively.

• KEPCO Journal on Electric Power and Energy
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• v.2 no.4
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• pp.589-593
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• 2016

Microbial fuel cell (MFC) can produce electricity from oxidation-reduction of organic and inorganic matters by electrochemically active bacteria as catalyst. Stacked MFCs have been investigated for overcoming low electricity generation of single MFC. In this study, two-typed stacked-MFCs (submerged-flat and stand-falt) were operated according to electrode connection for optimal stacked technology of MFC. In case of submerged-flat MFC with all separator electrode assembly (SEA) sharing anode chamber, MFC with mixed-connection showed more voltage loss than MFC with single-connection method. And MFC stacked in parallel showed better voltage production than MFC stacked in series. In case of stand-flat MFC, voltage loss was bigger when SEAs sharing anodic chamber only were connected in series. Voltage loss was decreased when SEAs parallel connected SEAs sharing anodic chamber were connected in series.