• Title/Summary/Keyword: solid phase epitaxy

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Distance between source and substrate and growth mode control in GaN nanowires synthesis (Source와 기판 거리에 따른 GaN nanowires의 합성 mode 변화 제어)

  • Shin, T.I.;Lee, H.J.;Kang, S.M.;Yoon, D.H.
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.18 no.1
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    • pp.10-14
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    • 2008
  • We synthesized GaN nanowires with high quality using the vapor phase epitaxy technique. The GaN nanowires were obtained at a temperature of $950^{\circ}C$. The Ar and $NH_3$ flow rates were 1000 sccm and 50 sccm, respectively. The shape of the GaN nanowires was confirmed through FESEM analysis. We were able to conclude that the GaN nanowires synthesized via vapor-solid (VLS) mechanism when the source was closed to the substrate. On the other side, the VS mechanism changed to vapor-liquid-solid (VLS) as the source and the substrate became more distant. Therefore, we can suggest that the large amount of Ga source from initial growth interrupt the role of catalyst on the substrate.

GaN epitaxy growth by low temperature HYPE on $CoSi_2$ buffer/Si substrates (실리콘 기판과 $CoSi_2$ 버퍼층 위에 HVPE로 저온에서 형성된 GaN의 에피텍셜 성장 연구)

  • Ha, Jun-Seok;Park, Jong-Sung;Song, Oh-Sung;Yao, T.;Jang, Ji-Ho
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.19 no.4
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    • pp.159-164
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    • 2009
  • We fabricated 40 nm-thick cobalt silicide ($CoSi_2$) as a buffer layer, on p-type Si(100) and Si(111) substrates to investigate the possibility of GaN epitaxial growth on $CoSi_2$/Si substrates. We deposited GaN using a HVPE (hydride vapor phase epitaxy) with two processes of process I ($850^{\circ}C$-12 minutes + $1080^{\circ}C$-30 minutes) and process II ($557^{\circ}C$-5 minutes + $900^{\circ}C$-5 minutes) on $CoSi_2$/Si substrates. An optical microscopy, FE-SEM, AFM, and HR-XRD (high resolution X-ray diffractometer) were employed to determine the GaN epitaxy. In case of process I, it showed no GaN epitaxial growth. However, in process II, it showed that GaN epitaxial growth occurred. Especially, in process II, GaN layer showed selfaligned substrate separation from silicon substrate. Through XRD ${\omega}$-scan of GaN <0002> direction, we confirmed that the combination of cobalt silicide and Si(100) as a buffer and HVPE at low temperature (process II) was helpful for GaN epitaxy growth.

Fabrication and Its Characteristics of HgCdTe Infrared Detector (HgCdTe를 이용한 Infrared Detector의 제조와 특성)

  • 김재묵;서상희;이희철;한석룡
    • Journal of the Korea Institute of Military Science and Technology
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    • v.1 no.1
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    • pp.227-237
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    • 1998
  • HgCdTe Is the most versatile material for the developing infrared devices. Not like III-V compound semiconductors or silicon-based photo-detecting materials, HgCdTe has unique characteristics such as adjustable bandgap, very high electron mobility, and large difference between electron and hole mobilities. Many research groups have been interested in this material since early 70's, but mainly due to its thermodynamic difficulties for preparing materials, no single growth technique is appreciated as a standard growth technique in this research field. Solid state recrystallization(SSR), travelling heater method(THM), and Bridgman growth are major techniques used to grow bulk HgCdTe material. Materials with high quality and purity can be grown using these bulk growth techniques, however, due to the large separation between solidus and liquidus line on the phase diagram, it is very difficult to grow large materials with minimun defects. Various epitaxial growth techniques were adopted to get large area HgCdTe and among them liquid phase epitaxy(LPE), metal organic chemical vapor deposition(MOCVD), and molecular beam epitaxy(MBE) are most frequently used techniques. There are also various types of photo-detectors utilizing HgCdTe materials, and photovoltaic and photoconductive devices are most interested types of detectors up to these days. For the larger may detectors, photovoltaic devices have some advantages over power-requiring photoconductive devices. In this paper we reported the main results on the HgCdTe growing and characterization including LPE and MOCVD, device fabrication and its characteristics such as single element and linear array($8{\times}1$ PC, $128{\times}1$ PV and 4120{\times}1$ PC). Also we included the results of the dewar manufacturing, assembling, and optical and environmental test of the detectors.

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Formation of $CoSi_2$ Film and Double Heteroepitaxial Growth of $Si/epi-CoSi_2/Si$(111) by Solid Phase Epitaxy (고상 에피택시에 의한 초박막 $CoSi_2$ 형성과 $Si/epi-CoSi_2/Si$(111)의 이중헤테로 에피택셜 성장)

  • Choi, Chi-Kyu;Kang, Min-Sung;Moon, Jong;Hyun, Dong-Geul;Kim, Kun-Ho;Lee, Jeong-Yong
    • Korean Journal of Materials Research
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    • v.8 no.2
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    • pp.165-172
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    • 1998
  • Epitaxial ultrathin films of $CoSi_2$ and double heteroepitaxial structure of Si/$CoSi_2$/Si(lll) were prepared on Si(111)-$7\times{7}$ substrate by in situ solid-phase epitaxy in a ultrahigh vacuum(LHV). The phase, chemical composition, crystallinity, and the microsructure of the Si/$CoSi_2$/Si(lll) interface were investigated by 2-MeV $^4He^{++}$ ion backscattering spectrometry, X-ray diffraction, and high-resolution transmission electron microscopy. The growth mode of the Co film was the Stransky-Krastanov type with texture when the substrate temperature was room temperature. A-type $CoSi_2$ ultrathin film was grown by deposition of about 50A Co on Si(ll1)-$7\times{7}$ substrate followed by in situ annealing at $700^{\circ}C$ for 10 min. The matching face relationships were $CoSi_2$[110]//Si[110] and $CoSi_2$(002)//Si(002) with no misorientation angle. The A-type $CoSi_2$/Si(lll) interface was abrupt and coherent. The best epi-Si/epi-$CoSi_2$2(A-type)/Si(lll) structure was obtained by deposition of Si film on the CoSii at $500^{\circ}C$ followed by in situ annealing at $700^{\circ}C$ for 10 min in UHV.

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Structural Characteristic of One Dimensional Single Crystalline of InN Nanowires (1차원 InN 단결정 나노선의 구조특성에 대한 고찰)

  • Byeun, Yun-Ki;Chung, Yong-Keun;Lee, Sang-Hoon;Choi, Sung-Churl
    • Journal of the Korean Ceramic Society
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    • v.44 no.4 s.299
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    • pp.202-207
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    • 2007
  • High-Quality 1-Dimensional InN single crystalline have been grown by Halide Vapor-Phase Epitaxy on the Au catalyst coated Si substrate using the vapor-liquid-solid growth mechanism. We have been grown 1-dimension InN nanowires having controlled the growth conditions for substrate temperature and gases flow rate. The grown InN nanowire of characteristics for morphologies, crystal structure, and element analysis were carried out by SEM, HR-TEM, and EDS respectively. And the defects of InN crystalline were analyzed by indexing of selective area diffraction pattern with attached HR-TEM. We have successfully obtained the defect-free 1-dimensional InN single crystalline nanowire at the atmosphere pressure.

The Formation of Epitaxial PtSi Films on Si(100) by Solid Phase Epitaxy (고상 에피택셜 성장에 의한 PtSi 박막의 형성)

  • 최치규;강민성;이개명;김상기;서경수;이정용;김건호
    • Journal of the Korean Vacuum Society
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    • v.4 no.3
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    • pp.319-326
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    • 1995
  • 초고진공에서 Si(100)-2X1 기판 위에 Pt를 약 100$\AA$의 두께로 증착한 후 in-situ로 열처리하는 고상에피택셜 성장법으로 PtSi 박막을 형성시켰다. XRD와 XPS 분석 결과 $200^{\circ}C$로 열처리한 시료에서는 Pt3Si, Pt2Si와 PtSi의 상이 섞여 있었으나 50$0^{\circ}C$로 열처리한 시료에서는 PtSi의 단일상만 확인되었으며, 형성된 PtSi 박막은 주상구조와 판상구조의 이중구조를 나타내었다. 기판 온도를 $500^{\circ}C$로 유지하면서 Pt를 증착한 후 $750^{\circ}C$에서 열처리한 경우에는 판상구조를 갖는 양질의 PtSi 박막이 에피택셜 성장되었다. HRTEM분석 결과 에피텍셜 성장된 PtSi와 기판 Si(100)의 계면은 PtSi[110]//Si[110], ptSi(110)//Si(100)의 정합성을 가졌다. 판상구조를 갖는 PtSi상의 에피택셜 방향은 기판과 열처리 온도에는 의존하나 열처리 시간에는 무관한 것으로 나타났다.

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XTEM Study of 1 MeV Argon Ion Implantation Induced Defects in Si and Their Annealing Behavior (1MeV Argon 이온주입에 의해 유기되 결합 및 회복기구의 XTEM 분석)

  • ;;;;;Hiroshi Kuwano
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.30A no.8
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    • pp.42-48
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    • 1993
  • Ar ions were implanted at 1 MeV into (100)Cz Si wafers with dose of 1 * 10$^{15}$ ions/cm$^{2}$. Damage induced by high energy implantation and its annealing behavior during rapid thermal annealing for 10sec at temperatures from 550 to 1100${\circ}C$ were investigated by crosssection transmission electron microscopy study. It can be clearly seen from the observation that the SPE(Solid Phase Epitaxy) regrowth of the buried amorphous layer induced by ion implantation proceeds from both upper and lower amorphous/crystalline (a/c) interfaces, and the activation energy for SPE from interfaces were both 1.43eV. Misfit dislocation where two interfaces met was formed and it coalesced into the hair pin dislocation in the upper regrown region. At the higher temperature after annealing out of the misfit dislocation, hair pin dislocations showed considerable drop in its bandwidth. However, they were not disappeared even at the temperature 1100${\circ}C$ with the end of range dislocation loops which were formed at the original lower a/c interface.

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Properties of YIG films grown by solid phase epitaxy (고상 에피택시법으로 성장한 YIG 박막의 특성)

  • ;S. Yamamoto
    • Proceedings of the Korean Magnestics Society Conference
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    • 2003.06a
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    • pp.192-193
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    • 2003
  • YIG 에피택시박막은 다른 강자성, 페리자성재료에 비해 수 GHz의 영역에서 매우 우수한 특성을 나타내고 있다. YIG 에피택시 박막은 고상에피택시 방법으로 제조할 경우 매우 편리하게 제조할 수 있는 것으로 알려져 있는데, 이 방법은 상온에서 Y-Fe-O 박막을 GGG(111)기판에 스파터한 뒤 공기 중에서 열처리하면 간편하게 얻을 수 있다. 이 방법은 통상과 같이 고온에서 아주 느린 속도로 에피택시박막을 성장시키는 스파터방법에 비해 매우 간편하고 경제적인 것으로, 본 연구에서는 보통의 분말소결공정으로 제작된 2.5인치 YIG 타겟을 사용하여 두께 2.5 $\mu\textrm{m}$ 비정질 Fe-Y-O 박막을 만든 뒤 550 - 1050 $^{\circ}C$의 공기 중에서 열처리하였다. 비정질 박막을 $600^{\circ}C$이하에서 10 시간동안 열처리하였을 경우 매우 약한 YIG상의 회절선만 관찰할 수 있었다. 반면에 온도를 $650^{\circ}C$로 올리면 매우 강한 (444) 또는 (888)회절선과 매우 약한 다른 회절선을 관찰 할 수 있었다. 이 시편의 경우 (888)회절선의 강도는 GGG기판의 (888)회절선의 강도와 비교할 정도로 매우 강하여 에피택시성장이 매우 잘 이루어질 수 있다는 가능성을 확인할 수 있었다. 그리고 YIG(888) 회절선의 록킹곡선의 반가폭이 0.14$^{\circ}$ 이었고, 이것은 에피택시성장이 매우 잘 이루어지고 있음을 의미하는 것이다. 열처리 온도가 감소함에 따라 YIG박막의 격자상수는 감소하였으며 YIG(888)회절선의 강도는 그림 1과 같이 넓어지고 그 강도는 약해진다.

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Suppression of surface $SiO_2$ layer and Solid Phase Epitaxy of Si films Using heating-up under $Si_2H_6$ environment (승온시 $Si_2H_6$ 가스 주입을 이용한 표면 $SiO_2$의 억제 및 비정질 Si의 고상 에피텍시에 관한 연구)

  • 최태희;남승의;김형준
    • Journal of the Korean Vacuum Society
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    • v.5 no.3
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    • pp.239-244
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    • 1996
  • We firstly report that formation of $SiO_2$ layer on Si surface can be effectively prevented by flowing the $Si_2H_6$ gas during the heating-up procedure for amorphous Si depositions. In this way, amorphously deposited Si layer onto crystalline Si substrates can be grown epitaxially during the post-deposition heat treatments. The suppression of surface $SiO_2$ can be explained in terms of adsorption of SiHx adspecies, instead of oxygen from residual gases in the reactors, to Si surfaces after desorption of hydrogen from H-passivated Si surfaces. Employing $Si_2H_6$ flowing and soild phase epitaxial growth, high-quality epitaxial Si layer can be obtained at low temperatures below $600^{\circ}C$ without conventional high temperature cleaning procedures.

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Selective Growth of Nanosphere Assisted Vertical Zinc Oxide Nanowires with Hydrothermal Method

  • Lee, Jin-Su;Nam, Sang-Hun;Yu, Jung-Hun;Yun, Sang-Ho;Boo, Jin-Hyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.08a
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    • pp.252.2-252.2
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    • 2013
  • ZnO nanostructures have a lot of interest for decades due to its varied applications such as light-emitting devices, power generators, solar cells, and sensing devices etc. To get the high performance of these devices, the factors of nanostructure geometry, spacing, and alignment are important. So, Patterning of vertically- aligned ZnO nanowires are currently attractive. However, many of ZnO nanowire or nanorod fabrication methods are needs high temperature, such vapor phase transport process, metal-organic chemical vapor deposition (MOCVD), metal-organic vapor phase epitaxy, thermal evaporation, pulse laser deposition and thermal chemical vapor deposition. While hydrothermal process has great advantages-low temperature (less than $100^{\circ}C$), simple steps, short time consuming, without catalyst, and relatively ease to control than as mentioned various methods. In this work, we investigate the dependence of ZnO nanowire alignment and morphology on si substrate using of nanosphere template with various precursor concentration and components via hydrothermal process. The brief experimental scheme is as follow. First synthesized ZnO seed solution was spun coated on to cleaned Si substrate, and then annealed $350^{\circ}C$ for 1h in the furnace. Second, 200nm sized close-packed nanospheres were formed on the seed layer-coated substrate by using of gas-liquid-solid interfacial self-assembly method and drying in vaccum desicator for about a day to enhance the adhesion between seed layer and nanospheres. After that, zinc oxide nanowires were synthesized using a low temperature hydrothermal method based on alkali solution. The specimens were immersed upside down in the autoclave bath to prevent some precipitates which formed and covered on the surface. The hydrothermal conditions such as growth temperature, growth time, solution concentration, and additives are variously performed to optimize the morphologies of nanowire. To characterize the crystal structure of seed layer and nanowires, morphology, and optical properties, X-ray diffraction (XRD), field emission scanning electron microscopy (FE-SEM), Raman spectroscopy, and photoluminescence (PL) studies were investigated.

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